Rockwell International Corporation

Bor-Rong Horng

Raouf Halim

Lorenzo L Longo

Daryush Shamlou

A circuit for reducing switching noise caused by harmonics of an output coupled to a band of interest in a mixed signal communication device, with the mixed signal communication device having a predetermined sampling clock. The circuit comprises a bandpass delta-sigma modulator for receiving an input centered at intermediate frequency ('IF') to generate a digital output, In-phase and Quadrature-phase digital mixers for mixing the digital output from the bandpass delta-sigma modulator down to baseband digital signals, first and second digital integrators coupled to the digital mixers for integrating the baseband digital signals to generate integration outputs, first and second decimation latches coupled to the digital integrators for generating latched integration output, a programmable counter for generating jitter sampling clocks based on the predetermined sampling clock, where the jitter sampling clock has a fixed average sampling rate, first and second FIR engines coupled to the decimation latches for differentiating, low-pass filtering and droop-correcting the latched integration outputs, using the jitter sampling clocks to generate first and second filtered digital outputs.

Jitter circuit for reduced switching noise

A single bit bandpass analog-to-digital converter has an analog summer, an analog bandpass filter, a single bit quantizer, and a single bit digital-to-analog converter connected in a loop. An input signal to the single bit filter is applied to a plus input terminal of the summer, and the output of the digital-to-analog converter is applied to a minus input terminal of the summer. The output signal from the single bit filter is taken from the output of the quantizer. The bandpass filter is preferably driven by a digital clock running at the same frequency as the quantizer and the digital-to-analog converter. This architecture reduces quantization noise within the passband at the possible expense of increasing it outside the passband. The passband is centered precisely on one-quarter of the clock frequency.

Single bit bandpass analog-to-digital converter

A digitally driven, analog bandpass filter has an analog summer and two analog delay elements connected in a loop. An input signal to the filter is applied to a plus input terminal of the summer, and the output of the second delay elements is applied to a minus input terminal of the summer. The output of filter may be taken either from the output of the summer, or from the output of the second delay element, or from any point in between. Each delay element is driven by a two phase non-overlapping clock, and each element passes a charge from a first capacitor through an op amp to either a second capacitor (first phase) or a third capacitor (second phase). Amplification may be provided by adjusting the ratio of the second (or third) capacitor to the first capacitor. If a differential op amp is used, both sides of the op amp are clocked together, and each side has its own trio of capacitors identical to the trio on the other side. The passband is centered precisely on one-quarter of the clock frequency, and does not vary with manufacturing variances in the components of the filter.

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Mission Viejo, CA, United States of America

Bor-Rong Horng