Samsung Electronics Co., Ltd.

BongJin Son

Jangwoo Lee

Jin-Woo Park

Jongkook Kim

Min-Ok Na

Hyo-Chang Ryu

Yose Eum

Provided are an image sensor package with improved reliability and a method of fabricating the same. The image sensor package includes a package substrate, an image sensor chip mounted on the package substrate, a transparent cover on the image sensor chip, an encapsulant encapsulating the image sensor chip and covering a side surface of the transparent cover, a dam on a surface of the image sensor chip and surrounding a portion of the upper surface of the image sensor, the transparent cover on the dam, a bonding wire connecting a chip pad of the image sensor chip to a substrate pad of the package substrate, the dam covering a first end of the bonding wire connected to the chip pad, and a stress reducing layer covering a second end of the bonding wire connected to the substrate pad, the stress reducing layer including substantially the same material as the dam.

Image sensor package and method of fabricating the same

An integrated circuit device includes: a substrate having an active surface, an inactive surface, a first region and a second region; a device structure on the active surface, and including individual devices disposed in the first region and a target through-region disposed in the second region; a multilayer wiring structure including wiring layers, wherein at least one wiring layer among the wiring layers has a landing pad overlapping the target through-region; and a through-via structure connected to the landing pad by penetrating through the second region and the target through-region, wherein the target through-region includes first insulating material patterns and dummy device patterns, wherein the first insulating material patterns each have a first area, wherein the dummy device patterns are on the active surface and each have a second area smaller than the first area, and wherein the first insulating material patterns are alternatively arranged with the dummy device patterns.

Integrated circuit device including a through-via structure

Provided are a thermal interface material layer and a package-on-package device including the same. The package-on-package device may include a thermal interface material layer interposed between lower and upper semiconductor packages and configured to have a specific physical property. Accordingly, it is possible to prevent a crack from occurring in a lower semiconductor chip, when a solder ball joint process is performed to mount the upper semiconductor package on the lower semiconductor package.

Thermal interface material layer and package-on-package device including the same

Provided are an apparatus for manufacturing a semiconductor device and a method of manufacturing a semiconductor package using the same. The manufacturing apparatus may include a base with a plurality of through holes and weight blocks respectively bound by the through holes.

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Asan-si, South Korea

BongJin Son