Samsung Electronics Co., Ltd.

Bong-young Yoo

Nae-in Lee

Young-wook Park

Dae-Hong Ko

Si-Young Choi

Byung-Lyul Park

Sang-in Lee

Hyeon-Deok Lee

Dae-hong Ko

Il-gu Kim

A semiconductor device adopting an interlayer contact structure between upper and lower conductive layers and a method of manufacturing the semiconductor device adopting the structure are provided. The lower conductive layer includes a first conductive layer and a first silicide layer stacked together. The upper conductive layer includes a second conductive layer doped with impurities and a second silicide layer stacked together. In the interlayer contact structure, the first and second conductive layers are in direct contact with each other. This decreases the contact resistance between the two conductive layers and improves the electrical properties of the device.

Method of forming a contact structure having an anchoring portion

Apparatus and manufacturing method for semiconductor device adopting NA interlayer contact structure

A method of manufacturing an electrical interconnection of a semiconductor device produces an erosion protecting plug in a contact hole to protect a selected portion of an interlayer dielectric layer when the interlayer dielectric layer is being etched to form a recess for a conductive line. The contact hole is formed in the interlayer dielectric layer. The contact hole is filled with an organic material to form the erosion protecting plug. The organic material is a photoresist material or an organic polymer. A photoresist pattern is formed for exposing the erosion protecting plug and a portion of the interlayer dielectric layer adjacent to the erosion protecting plug. A recess which extends down to the contact hole is formed by etching the portion of the interlayer dielectric layer which is exposed by the photoresist pattern. The erosion protecting plug and the photoresist pattern are then removed. A conductive line filling the recess and a contact filling the contact hole are then formed.

Method of manufacturing an electrical interconnection of a semiconductor device using an erosion protecting plug in a contact hole of interlayer dielectric layer

A tungsten or other metal layer is chemical vapor deposited using a source gas containing tungsten, a reducing gas and a nitrogen-containing gas. The nitrogen-containing gas can act as a surface roughness reducing gas that reduces the roughness of the tungsten layer compared to a tungsten layer that is chemical vapor deposited using the source gas containing tungsten and the reducing gas, but without using the surface roughness reducing gas. Viewed in another way, the nitrogen-containing gas acts as a growth rate controlling gas that produces uniform growth of the tungsten layer in a plurality of directions compared to a tungsten layer that is deposited using the source gas containing tungsten and the reducing gas, but without using the growth rate controlling gas.

Chemical vapor deposition of tungsten using nitrogen-containing gas

Methods of forming electrical interconnects on semiconductor substrates include the steps of forming a first electrically insulating layer (e.g., silicon dioxide) and then forming a contact hole in the insulating layer to expose a layer underlying the insulating layer. A first electrically conductive region (e.g., W, Ti, Tin, Al) is then formed in the contact hole. A step is then performed to remove a portion of the first electrically insulating layer to define a recess therein which preferably surrounds an upper portion of the first conductive region. A second electrically conductive region (e.g., Al, Cu, W, Ti, Ta and Co) is then formed in the recess. Here, the first conductive region is preferably chosen to have good step coverage capability to fully bury the contact hole and the second conductive region is preferably chosen to have very low resistance even if some degree of step coverage capability is sacrificed. Planarization steps (e.g, CMP, etch-back) may also be performed to define the first conductive region in the contact hole and define the second conductive region in the recess surrounding the first conductive region. Barrier metal layers may also be conformable deposited in the contact hole prior to forming the first conductive region therein and in the recess prior to forming the second conductive region therein.

Methods of forming electrical interconnects on semiconductor substrates

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Seoul, South Korea

Bong-young Yoo