Electronics and Telecommunications Research Institute

Bong-Soo Lee

Jun-Ki Kang

Ki-Hong Kim

Moon-Seok Kim

Sang-Woon Yang

Yun-Koo Lee

Jun-Young Son

Seok Hee Ryu

Sang-Han Lee

Jung-Gil Park

Jae-Heon Kim

Jung-Chul Ahn

Disclosed herein are a method for generating Gaussian error data using flash memory and an apparatus using the method. The method includes receiving a request to generate Gaussian error data and delivering an operation command to flash memory; generating Gaussian error noise based on a threshold voltage that is generated when the flash memory performs the operation command; and generating Gaussian error data so as to correspond to the Gaussian error noise and providing the same.

Method for generating Gaussian error data using flash memory and apparatus using the same

Disclosed herein are a Gaussian sampling apparatus and method based on resistive RAM. The Gaussian sampling apparatus based on resistive RAM includes Resistive RAM (RRAM) in which a resistive switching layer is disposed between an upper electrode and a lower electrode, and a sampling controller, wherein the sampling controller is configured to perform an operation corresponding to an erase command of applying a reset voltage to the RRAM when a Gaussian error request is received from an outside of the Gaussian sampling apparatus, perform an operation corresponding to a program command of applying a set voltage to the RRAM after the operation corresponding to the erase command has been completed, perform an operation of reading resistance data from the RRAM, and provide a response to the outside of the Gaussian sampling apparatus by transmitting the resistance data of the RRAM as Gaussian error data.

Gaussian sampling apparatus and method based on resistive random access memory

A low-power encryption apparatus and method are provided. The low-power encryption apparatus includes a mask value generation unit, a mask value application unit, a round key application unit, a mask operation unit, a shift operation unit, and a shift operation correction unit. The mask value generation unit generates a mask value M having the same bit length as input round function values. The mask value application unit generates first masking round function values by applying the mask value M. The round key application unit generates second masking round function values by applying round key values. The mask operation unit generates third masking round function values by performing a mask addition operation. The shill operation unit generates fourth masking round function values by performing a circular shift operation. The shift operation correction unit generates output round function values by performing an operation using the mask value M.

Low-power encryption apparatus and method

An apparatus and method for providing a security service are provided. The apparatus for providing a security service includes a first block cipher and a second block cipher. The second block cipher is independent of the first block cipher, and is configured to be used as a random number generator when the first block cipher is used to perform encryption/decryption, and to be used to perform encryption/decryption when the first block cipher is used as a random number generator.

Apparatus and method for providing security service

An apparatus for protecting against external attacks for a processor based on an ARM core and a method using the same are provided. A method for protecting against external attacks for a processor based on an ARM core in accordance with an embodiment of the present invention includes: setting up a register using a reset handler, which is executed first within a boot image; generating a control signal for protecting against external attacks using any one of an external debug request signal and an output signal of the register; and blocking a JTAG interface used for JTAG communication with the processor based on the ARM core according to the control signal for protecting against external attacks.

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Daejeon, South Korea

Bong-Soo Lee