Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Bon-Yong Koo

Jong-Hyuk Lee

Dong Yeon Son

Ji Young Jeong

Bae-Heuk Yim

Ju Hyeon Baek

Sun-Mi Kim

Jae-Hoon Lee

Yong Hee Lee

Yeong-Keun Kwon

Kyung-Wook Kim

Jung Hwan Hwang

Soo Jin Park

Jeong Min Park

Yun Hee Kwak

Ho Kyoon Kwon

Duc-han Cho

Jong-Moon Park

Seung-Hwan Moon

Junhyun Park

Sung-Man Kim

Hyunjoon Kim

Ji-Sun Kim

Sujin Lee

Yu-Jin Lee

Beom Jun Kim

Won-hee Lee

Yoon-Jang Kim

Tae Woo Lim

Jaeyong Jang

Ho-Kyoon Kwon

Mi-Sun Lee

Sang-Jin Jeon

Jung-Hun Noh

Joo-Yeon Won

Yeon Kyung Kim

Sun Kwang Kim

Sung-dong Park

Ki Hyun Pyo

Hyungjune Kim

Hyeong Seok Kim

Yun-Hee Kwak

Jeong-Il Kim

Duc-Han Cho

Eunje Jang

Chong-Guk Lee

Jang-Bog Ju

Seok-Hyun Jung

Danwon Lim

Dongyeon Son

A display device includes a display panel including a first pixel, a second pixel, and a connection line connecting the first pixel and the second pixel. Each of the first pixel and the second pixel includes a light emitting element, a first transistor including a first electrode, a second electrode electrically connected to the light emitting element, and a gate electrode, a second transistor connected between a first driving voltage line and a connection node and including a gate electrode connected to an emission line, a third transistor connected between a second driving voltage line and the connection node and including a gate electrode connected to the emission line, and a capacitor connected between the gate electrode of the first transistor and the connection node. The connection node of the first pixel is electrically connected to the connection node of the second pixel through the connection line.

Display device

A display apparatus includes: a substrate; a pixel circuit layer on the substrate and including a thin-film transistor; a display element layer on the pixel circuit layer and including a display element electrically connected to the thin-film transistor; a color filter layer on the display element layer and including a color filter overlapping the display element and a black matrix having a first side contacting the color filter and a second side extending in an edge direction of the substrate; and a blocking layer between the black matrix and the substrate, wherein a tip end of the blocking layer has no step difference with an end of the black matrix.

Display apparatus and method of manufacturing the same including cutting substrate and black matrix at tip end of blocking layer

A display substrate includes: a pixel circuit including: a switching transistor connected between a first terminal of a compensation capacitor and a data line; and a pixel transistor connected between a second terminal of the compensation capacitor and a first voltage line, the pixel transistor to receive a test voltage; and a test transistor including: a test gate terminal to receive a test signal; a test source terminal electrically connected to the first voltage line; and a test drain terminal electrically connected to the data line.

Display substrate and mother substrate for display substrate

A display device includes a first pixel circuit, a first scan signal line disposed at a side of the first pixel circuit, extending in a first direction, and transmitting a scan signal; a second pixel circuit disposed at an outermost side of the display device, and a first dummy wire disposed at an outside of the second pixel circuit and extending in the first direction. A width of the first dummy wire is less than a width of the first scan signal line.

Display device and display apparatus having display devices

A display device includes a display panel including a display and a non-display area, data lines, driving lines, power lines, and pixels connected to said lines being at the display area, a data driver for generating data signals supplied to the pixels, a power supply for generating a power signal supplied to the pixels, and a driving circuit at the non-display area and for generating driving signals supplied to the pixels, the driving circuit including stages for providing the driving signals to at least two of the driving lines, wherein data fan-out lines connected to the data driver are connected to the data lines, a power supply line connected to the power supply is connected to the power lines, and the driving circuit is connected to the driving lines, through a first connection line, a second connection line, a third connection line, and a fourth connection line.

Display panel and display device including the same

Provided is a display device, more particularly, a display device including a gate driver. The display device includes: a plurality of pixels; a plurality of gate lines connected to the plurality of pixels; a gate driver including a plurality of stages outputting gate signals to the plurality of gate lines; a clock signal wiring transferring a clock signal to the gate driver; a voltage wiring transferring an off voltage to the gate driver, in which the clock signal wiring is positioned at a first side of the gate driver, and the voltage wiring is positioned at a second side facing the first side of the gate driver.

A transistor array panel according to an exemplary embodiment includes a substrate, and a first transistor and a second transistor positioned on the substrate. Each of the first transistor and the second transistor includes: a first electrode; a second electrode overlapping the first electrode; a spacing member positioned between the first electrode and the second electrode; a semiconductor layer extending along a side wall of the spacing member; and a gate electrode overlapping the semiconductor layer. A thickness of the spacing member of the first transistor is larger than a thickness of the spacing member of the second transistor.

Transistor array panel and manufacturing method thereof

Provided is a display device, more particularly, a display device including a gate driver. The display device includes: a plurality of pixels; a plurality of gate lines connected to the plurality of pixels; a gate driver including a plurality of stages outputting gate signals to the plurality of gate lines; a clock signal wiring transferring a clock signal to the gate driver; a voltage wiring transferring an off voltage to the gate driver; in which the clock signal wiring is positioned at a first side of the gate driver, and the voltage wiring is positioned at a second side facing the first side of the gate driver.

A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.

Thin film transistor array panel including angled drain regions

A display device includes a first substrate, a second substrate, and a liquid crystal layer. The first substrate includes a common electrode, a pixel electrode, a first conductive layer spaced apart from the common electrode, and a second conductive layer disposed on the first conductive layer. The second substrate includes a spacer disposed to overlap with the first conductive layer and the second conductive layer on the first base substrate.

Display device and method of manufacturing the same

A display device is provided. A display device according to an exemplary embodiment of the present invention includes a display panel including: a display area where a plurality of pixels are disposed and a peripheral area near the display area; and a gate driver disposed in the peripheral area and including a transistor unit and a common voltage application unit, wherein the common voltage application unit overlaps via a first insulating layer disposed on the transistor unit.

The output stage of a monolithically integrated gate lines driver circuit of a display device has a capacitor boosted, source-follower configuration in which a relatively large area transistor (Tr) receives drive power at its drain from a clock signal providing rail (CK), a source of the transistor drives a respective gate line and a relatively large area boost capacitor (C) connects to gate and the source of the transistor. In order to reduce consumption of substrate area, the relatively large area boost capacitor is laid out to overlap the transistor while a relatively thick first insulating layer of relatively low dielectric constant positioned between the transistor and the overlying boost capacitor.

Display device having integral capacitors and reduced size

A gate driving circuit includes a shift register and a vertical start line. The shift register includes first to N-th circuit stages sequentially providing first to N-th gate-on signals to first to N-th gate lines, respectively, at least one reverse dummy stage adjacent to the first circuit stage and at least one forward dummy stage adjacent to the N-th circuit stage (N is a natural number). The vertical start line is electrically connected to the first circuit stage or the N-th circuit stage according to a scan direction and transfers a vertical start signal to the first or N-th circuit stage.

Gate driving circuit having forward and reverse scan directions and display apparatus implementing the gate driving circuit

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Cheonan-si, South Korea

Bon-Yong Koo