Lucent Technologies Inc.

International Business Machines Corporation

At+t Corp.

Bohdan Lew Bodnar

Ravi V Khadiwala

Ethan S Wozniak

Conrad Martin Herse

John R Carrell

Enn Tammaru

Alex Marchenko

Charles Calvin Byers

A method for execution by a dispersed storage and task (DST) processing unit includes receiving an access request via a network. A set of possible storage units for performance of the access request are determined. A latency summarization value is determined for each of the set of possible storage units based on historical latency data for the set of possible storage units. A weight for each of the set of possible storage units is determined based on the latency summarization values to generate a plurality of weights. A probabilistic selection function is performed in accordance with the plurality of weights to select a proper subset of the set of possible storage units. A plurality of requests are generated based on the access request for transmission, via the network, to the proper subset of the set of possible storage units.

Probabilistically selecting storage units based on latency or throughput in a dispersed storage network

Apparatus and a method for routing packets having destination addresses in their header. The routing modules of the router are of two types: simple routing modules which can only route packets whose destination address is stored in a limited memory of the module for storing corresponding output port addresses, and default modules which are used to find the identity of an output port for routing all other packets received by the simple routing modules of the router. Advantageously, the processing load of the simple routing modules is smoothed because these modules do not have to perform the complex searching functions required to find destination addresses not readily accessible in their memory. Advantageously, the single or small number of default routing modules can have sophisticated memory and processor facilities for searching over a very large number of destination addresses and for concentrating the process of sending queries to other routers for additional information.

Internet protocol packet router

The self-adaptive processor overload control system provides real time overload control and is fast to respond to processing overload conditions. The self-adaptive processor overload control system can detect surges and also has a dynamic range that can address overloads of significant size. It matches software operation to the CPU instruction cache operation to thereby increase the processor efficiency by reducing the average real time needed to process call activity. The self-adaptive processor overload control system maintains a counter for each queue, and sets a threshold value for each queue. The self-adaptive processor overload control system completely empties each queue to obtain a higher cache hit ratio, since code to serve each request is queued in cache memory and when successive requests on the same nature save on code retrieval time. The self-adaptive processor overload control system dynamically adjusts the queue size by starting low, then if the occupancy is low, linearly increases the queue size. If an overload condition is detected, then the self-adaptive processor overload control system significantly reduces the size of the queue to protect the processor. Once the overload condition has cleared, the self-adaptive processor overload control system resumes increasing the queue size. The overload is delegated outboard to the peripherals generating the overload of service requests rather than concentrating the overload at the processor.

Self-adaptive processor overload control system

A fuzzy-logic based overload control for packet switches wherein a distribution curve is developed regarding the overload possibility versus receive packet stream processing rate. The transmit packet stream is measured and a processing rate of the receive packet stream is measured. An overload possibility value is manipulated according to the measured bursts of the transmit packet stream and a location on the distribution curve of the measured processing rate. Packets are dropped from the transmit stream if the overload possibility value is above a threshold.

Fuzzy-logic based overload detection and correction for packet gateways

Apparatus and a method for interfacing between the Internet and the Telephone Network. A time slot interchange is enhanced by the addition of a supplementary memory for storing data for accumulating Internet packets. When a packet has been accumulated, the appropriate header is inserted into the packet under the control of a routing processor, and the packet can then be sent as a group of adjacent PCM samples over a connection to the Internet. In other embodiments, information is sent to the Internet over a direct data pipe for transmitting ATM cells or Ethernet packets. A Vocoder signal processor can be inserted between the TSI memory, and the supplementary memory to convert PCM voice samples into vocoded voice samples for transmission over the Internet. A modem signal processor can be interposed between the TSI memory and the supplementary memory to convert between analog data (representing for example, shift key analog signals) and binary data for transmission within packets over the Internet. Advantageously, existing TSI units can be used to interface with both the telephone plant and the Internet.

Switching internet traffic through digital switches having a time slot interchange network

A large router for routing datagrams. The large router comprises a plurality of router slices, each of which receives switches and transmits datagrams. Each router slice has a routing memory for routing the packets. If a packet is received whose destination address is not known to the receiving packet slice, the packet slice broadcasts a request for routing information for that datagram to the other packet slices of the large router and routes the packet in accordance with the received responses. Groups of slices are interconnected by a time slot interchange (TSI) unit, and groups of TSIs are interconnected by a time multiplexed switch. The router can consist of more than one switch; the switches being interconnected by high speed data links. Advantageously, the router, though composed of small slices, acts as if it were a single large high capacity entity.

Large packet switch router

A system and method for caching frequently called numbers so that call delivery time is shortened and the signaling network and service nodes are not overloaded by telephone number queries. In a distributed control switching system, each processor that performs digit analysis and has an area of memory. This area of memory is used as a cache to store directory number translation information. When a call arrives for a specified directory number (DN), if, after standard translation, the call cannot be normally routed, then the cache is consulted to determine whether the destination for that DN is in the cache. If it is, then the call is routed to the destination associated with the DN. If, however, the DN is not in the local cache, then a query is sent to one or more other units in the switch which may contain such caches in order to determine if these caches contain the destination. This 'distributed' query is still faster than querying a centralized database because all data queries throughout the switch are carried out in parallel.

Distributed virtual cache method for use in a database query control

A system and method that controls potential overload of packet switches when the packet switch has multiple packet streams with different priority levels. A counter is associated with the higher priority packet stream, so that when the counter reaches a predetermined number, the higher priority packet stream is disabled, so that the lower priority packet stream may be processed. When the counter reaches the predetermined number, interrupts are disabled, thus inhibiting processing of the higher priority packet stream. Advantageously, a predetermined number of polled packets are processed before interrupts are enabled.

Growing community of inventors

Park Ridge, IL, United States of America

Bohdan Lew Bodnar