Texas Instruments Corporation

Bob Lee

YuhHarng Chien

ChienHao Wang

Rongwei Zhang

Steven Su

Chia-Yu Chang

Kim Hong Lucas Chai

Chien Hao Wang

A semiconductor package includes a metallic substrate, the metallic substrate including a roughened surface, a semiconductor die including bond pads, and an adhesive between the roughened surface of a topside of the metallic substrate and the semiconductor die, therein bonding the semiconductor die to the metallic substrate. The adhesive includes a resin. The metallic substrate further includes a groove about a perimeter of the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic substrate. The groove straddles the topside and a sidewall of the metallic substrate.

Semiconductor package substrate with a smooth groove straddling topside and sidewall

A semiconductor package includes a metallic pad and leads spaced from the metallic pad by a gap, the metallic pad including a roughened surface. The semiconductor package further includes a semiconductor die including bond pads, and an adhesive between the roughened surface of the metallic pad and the semiconductor die, therein bonding the semiconductor die to the metallic pad, wherein the adhesive includes a resin. The metallic pad further includes a groove surrounding the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic pad.

Semiconductor package substrate with groove on die pad

A semiconductor device includes a substrate and a semiconductor die including an active surface with bond pads, an opposite inactive surface, and stepped side surfaces extending between the active surface and the inactive surface. The stepped side surfaces include a first planar surface extending from the inactive surface towards the active surface, a second planar surface extending from the active surface towards the inactive surface, and a side surface offset between the first planar surface and the second planar surface. The semiconductor device further includes an adhesive layer covering at least a portion of a surface area of the second surface and attaching the semiconductor die to the substrate.

Semiconductor die with stepped side surface

Semiconductor package substrate with a smooth groove about a perimeter of a semiconductor die

A leadframe includes a die pad having a plurality of sides which collectively define the rectangular die pad area including at least two securing sides that include a linear portion with a cantilever interrupting the linear portion. The die pad has a top surface defining a top plane and a bottom surface defining a bottom plane. Lead terminals are beyond the die pad. The cantilevers have a fixed end and a free end opposite the fixed ends that enables flexing or bending responsive to a received force. The free ends include a distal end with an electronic component locking feature. The fixed ends are positioned beyond the die pad area, and the electronic component locking feature extends inward over the rectangular die pad area for providing mechanical support and for securing the electronic component.

Leadframe with die pad having cantilevers to secure electronic component

A leadframe for encasing in a mold material includes a plurality of interconnected support members. A die pad is connected to the support members and includes a bottom surface. The die pad is configured to receive a die. A downset is connected to the die pad and positioned below the bottom surface. The downset includes at least one wall defining an interior volume for receiving a flow of the mold material to reduce the velocity of the mold material flow through the downset.

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Bob Lee