Neomagic Corporation

Marvellworld Trade Ltd.

Bo Ye

Jimmy Yang

Taesung Kim

Edmund Cheung

Chung Phan Vu

Edward M Jacobs

Systems and methods are provided for reducing motion blur in a video display. A system for reducing motion blur in a video display may include a motion detection circuit and a luminance control circuit. The motion detection circuit may be used to compare a plurality of frames in a video signal to generate a motion detection output signal that indicates whether the video signal includes an image that is in motion or a still image. The luminance control circuit may be used to vary luminance levels between two or more consecutive frames of the video signal when the motion detection output signal indicates that the video signal includes an image that is in motion. The luminance control circuit further may also be used to discontinue varying the luminance levels of the video signal when the motion detection output signal indicates that the video signal includes a still image.

Motion-adaptive alternate gamma drive for LCD

A graphics system reduces fetching from memory of color-key pixels when video pixels from a video-overlay window are displayed. A frame buffer is divided into multi-line, multi-pixel blocks that are arranged in block-rows and block-columns. Each block-row has primary and secondary row indicator bits and each block-column has two column indicator bits. When the primary row indicator bit is cleared, all pixels in the block-row are fetched from a frame-buffer memory. When the primary row indicator is set, a secondary row indicator bit selects either first or second column indicator bits for reading. When the selected column indicator bit for a block-column is set, fetching of pixels from the frame buffer memory is skipped. Instead, dummy color-key pixels are generated and inserted into the pixel stream. These dummy pixels match the color key and cause video pixels to be sent to the display. Memory fetching is reduced.

Complex-shaped video overlay using multi-bit row and column index registers

A frame buffer stores X pixels per line and Y lines and is read using a burst of B pixels. The un-rotated image is rotated by 90 degrees for display by writing and reading pixels from a line buffer. The line buffer stores a block of B*Y pixels. The frame buffer is logically divided into X/B blocks that are B pixels wide. Blocks are read from the frame buffer from the bottom line to the top with a burst of B pixels per line. An offset locate pixels to read in the line buffer. The offset is B for the first block, and increases by a factor of B for each block read, but wraps around modulo B*Y&#x2212;1. Pixels for a next block are written into the line buffer to locations vacated as pixels are read out. The increasing offset re-orders the pixels for the rotated display order.

Growing community of inventors

Cupertino, CA, United States of America

Bo Ye