Yangtze Memory Technologies Co., Ltd.

Huawei Technologies Co., Limited

Tencent Technology (shenzhen) Company Limited

Hon Hai Precision Industry Co., Ltd.

Aac Technologies Pte. Ltd.

Fu Tai Hua Industry (shenzhen) Co., Ltd.

Honor Device Co., Ltd.

E.i. Dupont De Nemours and Company

Huazhong University of Science and Technology

Vitae Pharmaceuticals, Inc.

Pulse Medical Imaging Technology (shanghai) Co., Ltd

Shenzhen Efercro Electronic Technology Co., Ltd

Shanghai Bio-heart Biological Technology Co., Ltd.

Fu Wai Hospital, Cams & Pumc

Albea Plastic Metallizing Technologies (shaghai) Co., Ltd.

Bo Xu

Chuan Yang

Lu Zhang

Ping Yan

Jing Gao

Zongliang Huo

Zhipeng Wu

Wei Su

Bing Liu

Wei Xu

Lingyuan Fan

Yuepeng Chen

Dengchao Wu

Jian Wang

Hongping Zhang

Fan Wang

Liang Xia

Chao Wang

Hai Jin

Li Li

Yi Tong Wang

Yiru Kuang

Jing Liu

Jie Dong

Chuting Yao

Lei Xue

Dawei Li

Tao Sun

Song Wu

Yu-Ching Liu

Xi-Hang Li

Jun He

Shengxian Tu

Wei Jin

Kai Han

Bin Yuan

Zongke Xu

Chi-An Yu

Wu Qing

Qiao Sun

Chao Peng

Jie-Peng Kang

Yi Wang

Jianzhong Huang

Qiangwei Zhang

Zhipeng Zhang

Zhenzhu Lv

Jiang Rui

Zhubiao Xue

Yali Guo

Lei Ding

Lan Fang Yu

Sen Zhang

Simin Liu

Hang Yin

Zi Yin

Liuqun Xie

Xuefeng Liu

Shijie Ren

Guohui Wang

Bin Chen

Huihao Xing

Yuhong Chu

Chaoyi Deng

Zhiyong Sun

Miao Chu

Ruofei Zhao

Yazhu Chen

Jie Su

Bin Zeng

Wang-Kai Yuan

Rui-Gang Xie

Li-Feng Xue

Nian Zhang

Qiuju Wu

Shaoshuai Sui

Longyun Zhu

Ping An

Shenglong Ling

Yinghao Li

Changyue Zhou

Shaolin He

Longxiang Yan

Fazhan Wang

Andrei Malkov

Siliu Zhang

Zaizhang Ye

Yongjian Wu

Baochuang Qu

Yinghong Zhao

Three-dimensional NAND memory device and method that eliminate leakage currents and short circuits are provided. The method includes: forming a gate line slit through a plurality of alternating layers of an oxide layer and a conductive material layer, where the conductive material layer is further formed on a sidewall and a bottom of the gate line slit; performing an ion implantation process to dope at least a portion of the conductive material layer that is on the bottom and/or a portion of the sidewall of the gate line slit; and performing an etch process in the gate line slit to remove the conductive material layer that is weakened by the ion implantation process.

Three-dimensional NAND memory device and method that eliminate leakage currents and short circuits

The present disclosure discloses a three-dimensional memory and a fabrication method thereof. The fabrication method comprises: forming a stack structure comprising alternately stacked dielectric layers and sacrificial layers; forming a gate line slit penetrating vertically penetrating the stack structure and extending in a first horizontal direction; and etching portions of the dielectric layers and the sacrificial layers adjacent to the gate line slit to form a plurality of recesses, wherein an aperture of each recess in a vertical direction is greater than a thickness of a corresponding sacrificial layer.

Three-dimensional memory and fabrication method thereof

Case for tablet computer

The present disclosure relates to a three-dimensional memory and a method for manufacturing the same. The three-dimensional memory includes a gate stack structure including a core area and a step area which are disposed in juxtaposition and in direct contact in a first direction; a dummy separation structure penetrating through the step area in the first direction; and a gate separation structure penetrating through the core area in the first direction, the gate separation structure having a first end in contact with the dummy separation structure in the first direction, the dummy separation structure having a second end in contact with the gate separation structure in the first direction, and the first end being located within the second end.

Three-dimensional memory and method for manufacturing the same

A communications method and apparatus are provided. A network device determines whether a first capability of a terminal device is less than or equal to a second capability of the terminal device. The first capability is a capability of the terminal device of working at a first frequency when the terminal device supports only a first radio access technology, and the second capability is a capability of the terminal device corresponding to the first frequency in a first frequency combination. When the first capability is less than or equal to the second capability, the network device sends a first message to the terminal device. The first message is used to indicate the terminal device to measure a second frequency, the first message does not include a configuration of a first measurement gap, and the first measurement gap is used to measure the second frequency.

Communications method and apparatus

A plurality of holes are formed extending vertically in a first dielectric deck that includes interleaved a plurality of first sacrificial layers and a plurality of first dielectric layers over a substrate. A plurality of sacrificial structures are formed in the holes. A second dielectric deck is formed having interleaved a plurality of second sacrificial layers and a plurality of second dielectric layers over the first dielectric deck. A slit opening is formed extending in the second dielectric deck, the slit opening aligned with and over the sacrificial source contact structures. The sacrificial structures are removed through the slit openings such that the slit opening is in contact with the holes to form a slit structure. A plurality of conductor layers are formed in the first and second dielectric decks through the slit structure, forming a memory stack. A source contact structure is formed in the slit structure.

Three-dimensional memory device having adjoined source contact structures and methods for forming the same

A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.

Memory device and fabrication method thereof

This application provides a touch control method and an apparatus, and relates to the field of communications technologies. The method includes: (S) obtaining, by a terminal, a first touch operation entered by a user on a touchscreen; (S, S, and S) and mapping, by the terminal when the first touch operation is performed on a first preset area in a target interface, the first touch operation to a second touch operation, so that a target application responds to the second touch operation, where the target interface is any interface that is presented by the target application and that covers the first preset area, and the target application is running in the foreground.

Touch control method and apparatus

Embodiments of structure and methods for forming a memory device are provided. In an example, a memory device includes a substrate, a stack above the substrate, a channel structure, and a source contact structure each extending vertically through the memory stack. The source contact structure includes (i) a plurality of first source contact portions each extending vertically and laterally separated from one another and (ii) a second source contact portion extending vertically over and in contact with the plurality of first source contact portions, the second source contact portion being laterally continuous.

Embodiments of a three-dimensional (3D) memory device with a corrosion-resistant composite spacer and method for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A dielectric stack including a plurality of dielectric/sacrificial layer pairs is formed on a substrate. A memory string extending vertically through the dielectric stack is formed. A slit extending vertically through the dielectric stack is formed. A memory stack is formed on the substrate including a plurality of conductor/dielectric layer pairs by replacing, with a plurality of conductor layers, the sacrificial layers in the dielectric/sacrificial layer pairs through the slit. A composite spacer is formed along a sidewall of the slit. The composite spacer includes a first silicon oxide film, a second silicon oxide film, and a dielectric film formed laterally between the first silicon oxide film and the second silicon oxide film. A slit contact extending vertically in the slit is formed.

Three-dimensional memory device with corrosion-resistant composite spacer

This application provides a touch control method and an apparatus, and relates to the field of communications technologies. The method includes: obtaining, by a terminal, a first touch operation entered by a user on a touchscreen; and mapping, by the terminal when the first touch operation is performed on a first preset area in a target interface, the first touch operation to a second touch operation, so that a target application responds to the second touch operation, instead of the first touch operation. The target interface is any interface that is presented by the target application and covers the first preset area, and the target application is an application running in the foreground.

A container for a rod-shaped material, comprising: an inner cylinder body having at least one longitudinal through hole formed in a side wall of the inner cylinder body; an outer cylinder body having at least one spiral groove formed on an inner wall of the outer cylinder body; and a support cylinder body for supporting the rod-shaped material, an outer wall of the support cylinder body having at least one convex column; wherein the inner cylinder body is accommodated in the outer cylinder body and rotatable relative to the outer cylinder body, the support cylinder body is accommodated in the inner cylinder body, the convex column is inserted into the longitudinal through hole and the spiral groove, such that the convex column moves along the spiral groove when the inner cylinder body rotates relative to the outer cylinder body; wherein at least one elastic pad and at least one elastic sheet are formed between the inner cylinder body and the outer cylinder body, the elastic pad is floatingly arranged in a radial direction of the inner cylinder body or the outer cylinder body, and the elastic sheet is arranged in a circumferential direction of the inner cylinder body or the outer cylinder body.

Container for a rod-shaped material

A method for forming a gate structure of a 3D memory device is provided. The method comprises: forming, on a substrate, an alternating dielectric stack including a plurality of dielectric layer pairs, each of the plurality of dielectric layer pairs comprising a first dielectric layer and a second dielectric layer different from the first dielectric layer; forming a slit penetrating vertically through the alternating dielectric stack and extending in a horizontal direction; removing the plurality of second dielectric layers in the alternating dielectric stack through the slit to form a plurality of horizontal trenches; forming a gate structure in each of the plurality of horizontal trenches; forming a spacer layer on sidewalls of the slit to cover the gate structures, wherein the spacer layer has a laminated structure; and forming a conductive wall in the slit, wherein the conductive wall is insulated from the gate structures by the spacer layer.

Three-dimensional memory devices and fabricating methods thereof

A three-dimensional (3D) NAND memory device is provided. The device comprises an alternating stack including a plurality of dielectric/conductive layer pairs each comprising a dielectric layer and a conductive layer. The device further comprises a conductive wall vertically penetrating through the alternating stack and extending in a horizontal direction, and a spacer layer on sidewalls of the conductive wall configured to insulate the conductive wall from the conductive layers of the alternating stack. The spacer layer comprises a first spacer sublayer having a first dielectric material, a second spacer sublayer having a second dielectric material, and a third spacer sublayer having a third dielectric material. The second spacer is sandwiched between the first spacer sublayer and the third spacer sublayer. A second k-value of the second dielectric material is higher than a first k-value of the first dielectric material and higher than a third k-value of the third dielectric material.

An APP remote control method and related devices. wherein method includes: a service device receiving a first operation instruction, where the first operation instruction is generated by a terminal device based on a first input on a start of an application icon of a first application program, and/or on a user interface of the first application program, the first application program runs on the service device, and the application icon and the user interface of the first application program are displayed on the terminal device; the service device responding to the first operation instruction through the first application program, and generating a first response result; and the service device extracting a first interface drawing instruction from the first response result, and sending it to the terminal device, where the first interface drawing instruction is used to draw an interface.

App remote control method and related devices

Growing community of inventors

Shenzhen, China

Bo Xu