Taiwan Semiconductor Manufacturing Comp. Ltd.

Bo-Wen Hsieh

Wen-Jia Hsieh

Yi-Chun Lo

Mi-Hua Lin

Wen-Hsin Chan

Pei Ying Lai

A gate dielectric structure is formed over a channel structure. One or more work function (WF) metal layers of a metal gate are formed over the gate dielectric structure. The one or more WF metal layers are treated with a fluorine-containing material. One or more processes are performed to cause fluorine from the fluorine-containing material to diffuse at least partially into the gate dielectric structure.

Introducing fluorine to gate after work function metal deposition

A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate stack structure formed over a substrate. The gate stack structure includes a gate electrode structure having a first portion and a second portion and a first conductive layer below the gate electrode structure. In addition, the first portion of the gate electrode structure is located over the second portion of the gate electrode structure, and a width of a top surface of the first portion of the gate electrode structure is greater than a width of a bottom surface of the second portion of the gate electrode structure.

Semiconductor structure with enlarged gate electrode structure and method for forming the same

A gate structure includes at least one spacer defining a gate region over a semiconductor substrate, a gate dielectric layer disposed on the gate region over the semiconductor substrate, a first work function metal layer disposed over the gate dielectric layer and lining a bottom surface of an inner sidewall of the spacer, and a filling metal partially wrapped by the first work function metal layer. The filling metal includes a first portion and a second portion, wherein the first portion is between the second portion and the semiconductor substrate, and the second portion is wider than the first portion.

Gate structure and method of fabricating the same

A method for manufacturing a semiconductor device is provided. The method includes etching a dummy gate to form a gate trench to expose a channel portion of a first fin and a first isolation structure; depositing a gate dielectric layer and first and second work function layers, wherein the second work function layer has a first portion directly over the channel portion of the first fin and a second portion directly over the first isolation structure; etching the second portion of the second work function layer, wherein the first portion of the second work function layer remains; depositing a third work function layer over and in contact with the first portion of the second work function layer and the first work function layer; and filling the gate trench with a gate metal.

Method for manufacturing semiconductor device

A semiconductor device includes a semiconductor substrate and a gate structure. The semiconductor substrate includes a first semiconductor fin and a second semiconductor fin. The gate structure includes a work function metal structure crossing over the first semiconductor fin and the second semiconductor fin. The work function metal structure comprises a first portion over a portion of the first semiconductor fin, a second portion over a portion of the second semiconductor fin, and a third portion connecting the first portion to the second portion, wherein a thickness of the third portion is smaller than a thickness of the second portion and greater than a thickness of the first portion along an extension direction of the second semiconductor fin.

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Miaoli County, Taiwan

Bo-Wen Hsieh