General Electric Company

International Business Machines Corporation

Montage Technology Co., Ltd.

Bo Qu

Jie Shen

Stefan Schroeder

Yingqi Zhang

Zhihui Yuan

Saijun Mao

Kunlun Chen

He Xu

Marius Michael Mechlinski

Si Shi

Jingkui Shi

Rui Li

Ying Zhang

Zhuohui Tan

Xu Fu

Fernando Javier D'Amato

Francis H Chan

Lin Lan

Alistair Martin Waddell

Xiongzhe Huang

Mark Aaron Chan Chan

Mark Aaron Chan

Lixin Jiang

Shuang Gu

Jinfu Chen

Rui Tu

Songtao Xu

Qin Lei

Hai Tao Cao

Shuitao Yang

Stafan Schroeder

A wind turbine is provided. The wind turbine includes a mechanical system, an electrical system and a controller. The controller is for determining an electrical capability limit of the electrical system according at least in part to one or more operating conditions of the wind turbine and one or more environment conditions of a site of the wind turbine, comparing the electrical capability limit of the electrical system and a mechanical capability limit of the mechanical system, and controlling the electrical system to operate at the smaller one of the electrical capability limit and the mechanical capability limit. A method for controlling a wind turbine comprising a mechanical system and an electrical system is also provided.

Wind turbine and method for controlling wind turbine

A delay circuit, a clock control circuit and a control method are disclosed. The delay circuit includes N-stage delay units coupled in a chain, the delay unit of each stage comprises the four-state gate circuit and an inverter circuit, an input terminal of a four-state gate circuit and an input terminal of an inverter circuit of each stage are coupled together, another input terminal of the inverter circuit is coupled to an output terminal of the inverter circuit of the next stage; an input signal is coupled to the input terminal of the four-state gate circuit and the inverter circuit of the first stage, and is output with a certain delay of time by sequentially passing through the four-state gate circuit and the inverter circuit of each stage.

Delay circuit, clock control circuit and control method

The present disclosure relates to an integrated power semiconductor packaging apparatus and a power converter containing the integrated power semiconductor packaging apparatus. The integrated power semiconductor packaging apparatus comprises a plurality of power semiconductor devices and an electrically insulative substrate formed integrally. The electrically insulative substrate comprises a flat surface, at least one separation wall protruding from the flat surface and a flow channel inside the electrically insulative substrate. The at least one separation wall is configured to separate the flat surface into a plurality of flat areas, and each of the plurality of flat areas is configured to receive one of the plurality of power semiconductor devices. The flow channel is configured for allowing a coolant flowing through to remove heat from the plurality of power semiconductor devices.

Integrated power semiconductor packaging apparatus and power converter

The present disclosure relates to a snubber circuit which comprises a static snubber unit, connected in parallel with the switch, for balancing a static voltage sharing across a switch when the switch is in a state of turn-on or turn-off; and a dynamic snubber unit for balance a dynamic voltage sharing across the switch when the switch is in a process of turn-on or turn-off, comprising a dynamic voltage sharing capacitor connected in parallel with the switch and having a relationship between a capacitance and a voltage of the dynamic voltage sharing capacitor; and a controller for controlling the capacitance of the dynamic voltage sharing capacitor to be in a predetermined working area of capacitance rising while the voltage across the switch is increasing. The present disclosure also relates to a power semiconductor device.

Power semiconductor device and snubber circuit thereof

A method used to control the operation of a converting device such that it can provide multi-level output voltage for loads. This method comprises at least the steps of: determine whether the load which the converter is providing electricity for is operating under the first condition or the second condition; generate the first pulse signal after determining that this load is operating under the first condition, select at least one of at least three different current paths, such that when the converter is selecting any of the current paths, it can provide output voltage at the same level; as well as generate the second pulse signal after determining that this load is operating under the second condition, such that the converter can perform the regular energy conversion operations.

System and method for power conversion

A circuit and method for power gating is provided. The circuit includes a switch circuit and a modulation oscillator. The switch circuit is connected between a circuit module and a power network having a target level. The switch circuit receives a control signal at its control signal input terminal to gate a connection between the circuit module and the power network under the control of the control signal. The switch circuit is connected to the circuit module at a first node. A modulation oscillator enabling signal input terminal is connected to a gating signal for enabling the modulation oscillator, a modulation oscillator control signal input terminal is connected to the first node, and an modulation oscillator output terminal is connected to the control signal input terminal of the switch circuit. The oscillation signal outputted from the modulation oscillator is modulated by the level of the first node.

Power gating

A power conversion system includes at least one multi-level power converter and a controller coupled to the at least one multi-level power converter. The controller includes a first CMV injection module and a second CMV injection module. The first CMV injection module generates a first CMV signal for modifying at least one voltage command to achieve a first function in association with operation of the power conversion system. The second CMV injection module generates a second CMV signal based at least in part on a local limit either for modifying the at least one voltage command or for further modifying the at least one modified voltage command to achieve a second function in association with operation of the power conversion system.

System and method for unified common mode voltage injection

A circuit of an output stage of a push-pull driver having dynamic biasing may include a stacked configuration of field effect transistors (PFETs) having a first PFET, a second PFET, and a third PFET, whereby the first PFET is connected to a first supply voltage, the third PFET is connected to an output of a switchable voltage bias generator circuit, and the second PFET is electrically connected between the first PFET and the third PFET. A transmission gate may be connected to a second supply voltage, whereby the transmission gate electrically connects the second supply voltage to an electrical connection between the first PFET and the second PFET based on a first operating state for preventing a voltage breakdown condition associated with the stacked configuration of PFETs. The third PFET is bias controlled via the switching of the output of the switchable voltage bias generator circuit.

Driver output with dynamic switching bias

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Shanghai, China

Bo Qu