University of Florida Research Foundation, Incorporated

Jsr Corporation

Mattrix Technologies, Inc.

Bo Liu

Andrew Gabriel Rinzler

Mitchell Austin McCarthy

Maxime Lemaitre

Hiromitsu Katsui

John Robert Reynolds

Franky So

Zhuangchun Wu

Maxime G Lemaitre

Xiao Chen

Max G Lemaitre

Mitchell Austin Mccarthy

A device configuration designed to mitigate display defects resulting from voltage drops in current supply lines offers a display with better display quality. The display includes: a plurality of VOLETs arranged in arrays along a first direction and a second direction; a data line supplying a voltage for controlling gate electrodes of the plurality of VOLETs; TFTs each connected between a gate electrode of each of the VOLET and the data line and controlling voltage supply to the gate electrodes of the VOLETs; a gate line connected to gate electrodes of the TFTs and transmitting a signal that controls the TFTs; a plurality of current supply lines extending along the first direction and supplying a current to each of a group of VOLETs aligned along the first direction; and an auxiliary line extending along the second direction and connecting at least two of the plurality of current supply lines.

Display

Various examples are provided related to driving a light emitting display in which variations in image quality and brightness can be suppressed despite long-term use, without adding a complicated circuit configuration. In one example, a method includes applying a voltage based on image data to be displayed to a gate electrode of a vertical organic light emitting transistor and applying a voltage, having a polarity opposite to that of the voltage applied to the gate electrode of the vertical organic light emitting transistor, to the gate electrode of the vertical organic light emitting transistor based on a value of a voltage being applied to a source electrode of the vertical organic light emitting transistor.

Method of driving a light emitting display and display

Various examples are provided related to compensating brightness of a display using a vertical organic light emitting transistor that suppresses variations in brightness over a long period of time and a display. In one example, a method includes applying a voltage for brightness inspection to a gate electrode of the vertical organic light emitting transistor to be corrected, measuring a current flowing through a current supply line through which the current is supplied to a source electrode of the vertical organic light emitting transistor by the application of the voltage for brightness inspection to the gate electrode of the vertical organic light emitting transistor to be corrected, and determining a corrected value of the voltage to be applied to the gate electrode of the vertical organic light emitting transistor based on a value of the current and characteristic information of the vertical organic light emitting transistor stored in the memory.

Method of compensating brightness of display and display

A liquid crystal display device includes: a substrate; a plurality of vertical organic light-emitting transistors; a data line that supplies a voltage to a gate electrode of the vertical organic light-emitting transistor; a thin-film transistor that is connected between the gate electrode of each of the vertical organic light-emitting transistors and the data line and controls supply of the voltage to the gate electrode of the vertical organic light-emitting transistor; a gate line that is connected to the gate electrode of the thin-film transistor and transmits a signal for switching the thin-film transistor; and a plurality of current supply lines that are wired in a first direction outside a formation region of the vertical organic light-emitting transistor, the current supply lines being in contact with a source electrode of the vertical organic light-emitting transistor to supply a current to the vertical organic light-emitting transistor.

Various aspects of tunable barrier transistors that can be used in high power electronics are provided. In one example, among others, a tunable barrier transistor includes an inorganic semiconducting layer; a source electrode including a nano-carbon film disposed on the inorganic semiconducting layer; a gate dielectric layer disposed on the nano-carbon film; and a gate electrode disposed on the gate dielectric layer over at least a portion of the nano-carbon film. The nano-carbon film can form a source-channel interface with the inorganic semiconducting layer. A gate field produced by the gate electrode can modulate a barrier height at the source-channel interface. The gate field may also modulate a barrier width at the source-channel interface.

Tunable barrier transistors for high power electronics

Various examples are provided for brightness compensation in a display. In one example, a method includes identifying an IR voltage drop effect on a pixel supplied by a supply voltage line and generating a brightness signal for the pixel based at least in part on the IR voltage drop effect. In another example, a method includes calculating values of IR voltage drop corresponding to pixels fed by a common supply voltage line and providing a data line signal to each pixel that compensates for the IR voltage drop. In another example, a display device includes a matrix of pixels and a brightness controller configured to determine an IR voltage drop effect on a pixel of the matrix and generate a brightness signal for the pixel based at least in part on the IR voltage drop effect and a temporal average pixel brightness within one refreshing cycle associated with the pixel.

Brightness compensation in a display

Various examples are provided for ambipolar vertical field effect transistors (VFETs). In one example, among others, an ambipolar VFET includes a gate layer; a source layer that is electrically percolating and perforated; a dielectric layer; a drain layer; and a semiconducting channel layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric layer and the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier. Another example includes an ambipolar vertical field effect transistor including a dielectric surface treatment layer. The semiconducting channel layer is in contact with at least a portion of the source layer and at least a portion of the dielectric surface treatment layer and where the source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Ambipolar vertical field effect transistor

Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS-VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.

Active matrix dilute source enabled vertical organic light emitting transistor

Various embodiments are provided for semiconductor devices including an electrically percolating source layer and methods of fabricating the same. In one embodiment, a semiconductor device includes a gate layer, a dielectric layer, a memory layer, a source layer, a semiconducting channel layer, and a drain layer. The source layer is electrically percolating and perforated. The semiconducting channel layer is in contact with the source layer and the memory layer. The source layer and the semiconducting channel layer form a gate voltage tunable charge injection barrier.

Semiconductor devices including an electrically percolating source layer and methods of fabricating the same

Embodiments of the invention relate to field effect transistors. The field effect transistor includes a gate electrode for providing a gate field, a first electrode including a conductive material having a low carrier density and a low density of electronic states, a second electrode, and a semiconductor. Contact barrier modulation includes barrier height lowering of a Schottky contact between the first electrode and the semiconductor. In some embodiments of the invention, a vertical field effect transistor employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Contact barrier modulation of field effect transistors

Embodiments of the invention relate to vertical field effect transistor that is a light emitting transistor. The light emitting transistor incorporates a gate electrode for providing a gate field, a first electrode comprising a dilute nanotube network for injecting a charge, a second electrode for injecting a complementary charge, and an electroluminescent semiconductor layer disposed intermediate the nanotube network and the electron injecting layer. The charge injection is modulated by the gate field. The holes and electrons, combine to form photons, thereby causing the electroluminescent semiconductor layer to emit visible light. In other embodiments of the invention a vertical field effect transistor that employs an electrode comprising a conductive material with a low density of states such that the transistors contact barrier modulation comprises barrier height lowering of the Schottky contact between the electrode with a low density of states and the adjacent semiconductor by a Fermi level shift.

Nanotube enabled, gate-voltage controlled light emitting diodes

A vertical field effect transistor (FET) comprises a gate electrode and a first electrode layer having a dielectric layer interposed between these electrodes and a semiconducting active layer electrically coupled to the first electrode. The active layer and the dielectric layer sandwich at least a portion of the first electrode where at least one portion of the active layer is unshielded by the first electrode such that the unshielded portion is in direct physical contact with the dielectric layer. A second electrode layer is electrically coupled to the active layer where the second electrode is disposed on at least a portion of the unshielded portion of the active layer such that the second electrode can form electrostatic fields with the gate electrode upon biasing in unscreened regions near the first electrode.

Growing community of inventors

Gainesville, FL, United States of America

Bo Liu