Texas Instruments Corporation

Bo-Hsun Pan

Yuh-Harng Chien

Hung-Yu Chou

Steven Alfred Kummerl

Chih-Chien Ho

Pi-Chiang Huang

Chung-Hao Lin

Fu-Hua Yu

Jeffrey Alan West

Byron Lovell Williams

Rajen Manicon Murugan

Jie Chen

Frank Yu

Sheng-Wen Huang

Chien-Chang Li

Zi-Xian Zhan

Dong-Ren Peng

Shawn Martin O'Connor

Stanley Chou

Chi-Chen Chien

An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

Integrated circuit die pad cavity

In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.

Semiconductor die mounted in a recess of die pad

In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.

Semiconductor device packages with high angle wire bonding and non-gold bond wires

A packaged electronic device has a package structure, first leads, second leads and a tie bar. The package structure has a first side, a second side, a third side, a fourth side, a fifth side and a sixth side, the second side spaced from the first side along a first direction, the fourth side spaced from the third side along an orthogonal second direction, and the sixth side spaced from the fifth side along an orthogonal third direction. The first leads extend outward in a first plane of the second and third directions from respective portions of the third side, the second leads extend outward in the first plane from respective portions of the fourth side, and the tie bar is exposed along the fifth side in a second plane of the second and third directions, the second plane between the first plane and the first side.

Electronic device with exposed tie bar

In some examples, a semiconductor package comprises a lead frame. The lead frame includes a first row of leads; a first pad coupled to the first row of leads; a second row of leads; and a second pad coupled to the second row of leads, the first and second pads separated by a gap. The semiconductor package includes a heat-generating device coupled to the first and second pads and exposed to an exterior of the semiconductor package.

Exposed heat-generating devices

In an example, an apparatus comprises a lead frame that includes a first row of leads, a first pad coupled to the first row of leads, and a second row of leads parallel to the first row of leads. The lead frame also includes a second pad coupled to the second row of leads. The first and second pads are separated by a gap, and each of the first and second pads has a substantially uniform thickness. The apparatus also includes a device coupled to the first and second pads. The first and second pads are exposed to an exterior of the apparatus.

Packages with multiple exposed pads

An electronic device includes a package structure with opposite first and second sides spaced apart along a first direction, opposite third and fourth sides spaced apart along a second direction, opposite fifth and sixth sides spaced apart along a third direction, the first, second, and third directions being orthogonal to one another. A set of first leads extend outward from the first side along the first direction, a set of second leads extend outward from the second side along the first direction, and a thermal pad includes a first portion that extends along a portion of the fifth side, and a second portion that extends along a portion of the third side to facilitate cooling and visual solder inspection when soldered to a host printed circuit board.

Electronic device with three dimensional thermal pad

Growing community of inventors

Taoyuan, Taiwan

Bo-Hsun Pan