Zarlink Semiconductor Limited

Bo Goran Alestig

Paul Ronald Stribley

Gary Charles Day

An integrated circuit capacitor and an integrated circuit are provided. The integrated circuit capacitor includes at least first, second and third conducting plates. The first conducting plate is positioned between the second and third plates. A first dielectric layer is positioned between the first and third conducting plates. A second dielectric layer is positioned between the first and second conducting plates. An 'overlap portion' of the second conducting plate extends beyond the edge of the first conducting plate and towards the third conducting plate. The capacitor is arranged so that the electrical breakdown voltage between the overlap portion and the third conducting plate is lower than the electrical breakdown voltage between the first and second conducting plates.

Growing community of inventors

Gothenburg, Sweden

Bo Goran Alestig