Oracle America, Inc.

Oracle International Corporation

Sun Microsystems, Inc.

Blake Alan Jones

George R Cameron

Jeffrey S Bonwick

Eric E Lowe

Jonathan William Adams

John E Zolnowsky

Sanjiv Kapil

Stan J Studzinski

Kit M Chow

Julia D Harper

Stephen Alan Chessin

Rodrick I Evans

Michael E Corcoran

A method for executing an executable file. The method includes executing instructions in the executable file by a first process, receiving a write request from a second process to write to the executable file, generating an anonymous file from the executable file in response to the write request, executing the anonymous file by the first process, and accessing the executable file by the second process.

Method and system for executing an executable file

A method for managing a corrupted memory block. The method includes detecting the corrupted memory block, and removing, after detecting the corrupted memory block, references to the corrupted memory block. The method further includes identifying, after detecting the corrupted memory block, an uncorrupted memory block and analyzing each cache line. The method further includes determining, while analyzing each cache line, that a first cache line includes an uncorrectable error and creating, based on determining the first cache line includes the uncorrectable error, a second cache line including an artificial error, and migrating the second cache line to the uncorrupted memory block, where a layout of the corrupted memory block is maintained.

Memory error propagation for faster error recovery

In general, in one aspect, the invention relates to a system that includes memory and a prediction subsystem. The memory includes a first memgroup and a second memgroup, wherein the first memgroup comprises a first physical page and a second physical page, wherein the first physical page is a first subtype, and wherein the second physical page is a second subtype. The prediction subsystem is configured to obtain a status value indicating an amount of freed physical pages on the memory, store the status value in a sample buffer comprising a plurality of previous status values, determine, using the status value and the plurality of previous status values, a deficiency subtype state for the first subtype based on an anticipated need for the first subtype on the memory, and instruct, based on the determination, an allocation subsystem to coalesce the second physical page to the first subtype.

Physical memory usage prediction

A method for accessing shared memory, the method includes loading a private context ID into a private context ID register, where the first private context ID enables a thread to access a private memory region only accessible by the thread. The method further includes receiving, from the thread, a first request to access a shared memory region, loading a shared context ID into a shared context register, permitting, by a memory management unit (MMU), the thread to access the shared memory region using the shared context ID, and receiving, from the thread, a second request to disable access to the shared memory region. The method further includes removing, in response to the second request, the shared context ID from the shared context ID register, where after removing the shared context ID from the shared context ID register the thread is no longer able to access the shared memory region.

Method and system for fast permission changes for virtual addresses

A system that includes a memory, a tilelet data structure entry, a first tile freelist, and an allocation subsystem. The memory includes a first tilelet on a first tile. The tilelet data structure entry includes a first tilelet preferred pagesize assigned to a first value. The first tile freelist for the first tile includes a first tile in-bounds page freelist, and a first tile out-of-bounds page freelist. The allocation subsystem is configured to detect that a first physical page is freed, store, in the first tile in-bounds page freelist, a first page data structure, detect that a second physical page is freed, store, in the first tile out-of-bounds page freelist, a second page data structure, and coalesce the memory using the second page and at least one of the physical pages associated with the plurality of out-of-bounds page data structures into a third physical page.

Memory range preferred sizes and out-of-bounds counts

A system including memory and a resource controller. The memory includes a first memgroup and a second memgroup, wherein the first memgroup comprises a first physical page mapped to a virtual page, and wherein the second memgroup comprises a second physical page. The resource controller is configured to receive a request to stop the first memgroup, instruct a memory power management subsystem to mark the first memgroup as stopped in response to receiving the request to stop the first memgroup, wherein no free pages are allocated from the first memgroup after the first memgroup is marked as stopped, remap the virtual page to the second physical page in response to the marking the first memgroup as stopped, and reduce power to the first memgroup in response to a determination that the first physical page is not mapped to the virtual page.

Operating system support for memory power management

A memory system that interleaves storage of data across and within a plurality memory modules is described. The memory system includes a hybrid interleaving mechanism which maps physical addresses to locations within memory modules and ranks so that physical addresses for a given page all map to the same memory module, and physical addresses for the given page are interleaved across the plurality of ranks which comprise the same memory module.

Hybrid interleaving in memory modules by interleaving physical addresses for a page across ranks in a memory module

A method involving receiving an indication of a requirement to allocate at least one page for a process, where pages are associated with cache colors; generating a selection bitmap by performing a logical operation of a system available colors bitmap and a process bitmap, where the system available colors bitmap and the process bitmap each include one bit corresponding to each cache color, where each bit of the system available colors bitmap indicates whether a number of pages associated with a corresponding cache color that are available to be allocated is above a minimum threshold, and where each bit of the process bitmap indicates whether any pages associated with the corresponding cache color have been recently allocated for the process. The method also includes selecting, using the selection bitmap, a cache color; and allocating a page for the process, wherein the allocated page is associated with the selected cache color.

System available cache color map

A device, system, and method are directed towards managing limited resources in a computer system with multiple processing units. Each processing unit has a corresponding bucket. Each thread executing on a processing unit has a corresponding wallet. Buckets and wallets contain credits corresponding to units of the limited resource. When a request for the resource is made, mechanisms of the invention attempt to fulfill the request by looking in a local wallet, a local bucket, or non-local buckets. In a resource shortage situation, credits may be moved to a primary bucket. A load balancing mechanism may distribute credits among buckets, or move credits from wallets to buckets.

Scalable resource allocation

A method for loading shared libraries. The method includes receiving an indication of a requirement to load the shared library into the virtual memory and determining that the shared library is a candidate for using shared large pages. Further, the method includes, in response to the determination, storing a text section of the shared library in a shared large page of the virtual memory and storing a data section of the shared library in a page of the virtual memory, where the virtual memory is mapped to a physical memory of the computer, where, within an address space of the virtual memory, a starting address of the text section of the shared library is separated from a starting address of the data section of the shared library by a predefined distance, and where the predefined distance is larger than a size of the large page.

Large memory pages for shared libraries

The invention relates to mapping data to a process. A method of the invention includes receiving a request to copy a parent process, where the parent process is associated with a first virtual memory address space that includes a first mapping to a page of a file loaded into physical memory. The method includes creating a child process (of the parent process) associated with a second virtual memory address space. The method includes determining that a fork count is greater than a fork count threshold and a COW count to fork count ratio is greater than a threshold ratio. The fork count is associated with the file and the COW count is associated with the page. The method includes creating a copy of the page in physical memory and further includes creating a second mapping from the second virtual memory address space to the copy of the page.

Method and system for mapping data to a process

Managing physical memory for one or more processes with both a minimum and a maximum amount of physical memory. Memory sets are created, each specifying a number of credits. The total number of credits specified by all memory sets are equal to the total number of pages in physical memory. One or more processes are bound to a memory set. All of the processes bound to a memory set are collectively referred to as the workload of the memory set. Each physical page is accounted for to ensure that each workload can utilize at least the number of physical pages equaling the number of credits in its memory set. Additionally, a workload is permitted to use physical pages that are being explicitly shared by workloads of other memory sets. Accordingly, a workload with both a minimum and a maximum amount of physical memory is specified by its memory set.

Partitionable accounting of memory utilization

A method for propagating reference and modification bit values into a translation table. The method includes issuing a write instruction including a virtual address, translating the virtual address to a corresponding physical address in a corresponding entry in a TLB, writing data to the corresponding physical address, setting at least one of a reference bit value or a modification bit value in the corresponding entry in the TLB, analyzing the TLB to identify any set reference bit values and set modification bit values, updating a corresponding entry in a translation table for each one of the identified set reference bit values and the identified set modification bit values and resetting the identified set reference bit values and the identified set modification bit values in the TLB.

System and method for reference and modification tracking

A method of identifying a shared main memory page containing a physical address corresponding to a virtual address included in an issued write instruction. The method includes determining the selected virtual address is not within a reach of a TLB entry that is currently loaded in the TLB. If one of the BBR entries includes the selected virtual address, then identifying one of the BBR entries that includes the selected virtual address, calculating a new TLB entry that includes the selected virtual address and loading the new TLB entry in the TLB.

Growing community of inventors

Oakland, CA, United States of America

Blake Alan Jones