Infineon Technologies Austria Ag

Infineon Technologies Ag

Björn Fischer

Franz Hirler

Hans-Joachim Schulze

Anton Mauder

Armin Willmeroth

Franz-Josef Niedernostheide

Joachim Weyers

Markus Schmitt

Stefan Gamerith

Hans Weber

Matthias Goldbach

Matteo-Alessandro Kutschak

Andreas Riegler

Winfried Kaindl

Stefan Jakschik

Till Schlösser

Ulrich Frey

Katarzyna Kowalik-Seidl

Richard Hensch

A transistor device is disclosed. The transistor device includes: a semiconductor body (); a drift region () in the semiconductor body (); a plurality of transistor cells (); and a gate node (G) and a source node (S), wherein each of the plurality of transistor cells () includes: a first trench electrode () insulated from the semiconductor body () by a first dielectric layer (); a second trench electrode () insulated from the semiconductor body () by a second dielectric layer (); a source region () and a body region () in a first mesa region () between the first trench electrode () and the second trench electrode (); and a compensation region (), wherein the compensation region () adjoins the body region (), the first dielectric (), the second dielectric (), and forms a pn-junction with the drift region (), and wherein from the first trench electrode () and the second trench electrode () at least the first trench electrode () is connected to the gate node (G).

Superjunction transistor device

A transistor device is enclosed. The transistor device includes: a semiconductor body; a plurality of drift regions of a first doping type; a plurality of compensation regions of a second doping type adjoining the drift regions; and a plurality of transistor cells each including a body region adjoining a respective one of the plurality of drift regions, a source region adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. The source regions of the plurality of transistor cells are connected to a source node, the body regions of the plurality of transistor cells are separated from the plurality of compensation regions in the semiconductor body, and the plurality of compensation regions are ohmically connected to the source node.

Superjunction transistor device with soft switching behavior

In a field-effect semiconductor device, alternating first n-type and p-type pillar regions are arranged in the active area. The first n-type pillar regions are in Ohmic contact with the drain metallization. The first p-type pillar regions are in Ohmic contact with the source metallization. An integrated dopant concentration of the first n-type pillar regions substantially matches that of the first p-type pillar regions. A second p-type pillar region is in Ohmic contact with the source metallization, arranged in the peripheral area and has an integrated dopant concentration smaller than that of the first p-type pillar regions divided by a number of the first p-type pillar regions. A second n-type pillar region is arranged between the second p-type pillar region and the first p-type pillar regions, and has an integrated dopant concentration smaller than that of the first n-type pillar regions divided by a number of the first n-type pillar regions.

Field-effect semiconductor device having pillar regions of different conductivity type arranged in an active area

Field-effect semiconductor device having alternating n-type and p-type pillar regions arranged in an active area

A field-effect semiconductor device includes a semiconductor body having a first surface and an edge, an active area, and a peripheral area between the active area and the edge, a source metallization on the first surface and a drain metallization. In the active area, first conductivity type drift portions alternate with second conductivity type compensation regions. The drift portions contact the drain metallization and have a first maximum doping concentration. The compensation regions are in Ohmic contact with the source metallization. The peripheral area includes a first edge termination region and a second semiconductor region in Ohmic contact with the drift portions having a second maximum doping of the first conductivity type which lower than the first maximum doping concentration by a factor of ten. The first edge termination region of the second conductivity type adjoins the second semiconductor region and is in Ohmic contact with the source metallization.

Charge compensation semiconductor devices

Transistor structures, with one source/drain region connected to a charge storage device to be insulated includes an asymmetric gate conductor structure. At a first side wall, which faces the one source/drain region, the asymmetric gate conductor structure has a side wall oxide with a greater thickness and a bird's beak structure with a greater length than at an opposite, second side wall. An effective channel length is increased for the same feature size of the gate conductor structure. Memory cells can be realized in a higher density.

Transistor structure, memory cell, DRAM, and method for fabricating a transistor structure in a semiconductor substrate

A semiconductor device having a gate structure, the gate structure having a first gate dielectric made of a first material having a first thickness and a first dielectric constant, which is situated directly above the channel region, and an overlying second gate dielectric made of a second material having a second thickness and a second dielectric constant, which is significantly greater than the first dielectric constant; and the first thickness of the first gate dielectric and the second thickness of the second gate dielectric being chosen such that the corresponding thickness of a gate structure with the first gate dielectric, to obtain the same threshold voltage, is at least of the same magnitude as a thickness equal to the sum of the first thickness and the second thickness. The invention also relates to a corresponding fabrication method.

Semiconductor device and corresponding fabrication method

Growing community of inventors

Munich, Germany

Björn Fischer