Digital Equipment Corporation

Bipin Mistry

Neal Andrew Crook

Vincent G Gavin

Michael J Seaman

Robert J Galuszka

John M Lenthall

Paul L Bruce

Clinton Choi

A data transfer device for coupling a processor to a system bus. The data transfer device includes data packers and unpackers for converting between data blocks of a first size and data blocks of a second size, e.g. between bytes or words and longwords. The data transfer device also includes an internal buffer memory system for storing the data being transferred. The processor and system bus are selectively coupled, each one at a time, via a direct data path, to the internal buffer memory system permitting both the processor and the system bus to independently read and write data, each at their normal data transfer rate.

Data transfer system for buffering and selectively manipulating the size

System for transferring data between a processor and a system bus

An apparatus and method for supplying an address and data to an external memory device. The number of pins available for supplying the address is less than the number of address lines required at the external memory device. A register is used to store the high order bits of the address and is pre-loaded with a default page value. An output of the register is coupled to an address input of the external memory. If the high order bits of the address are equal to the default page value, a control device couples the data lines directly to the external memory device and a read or write operation follows. If the two values are different, a paging cycle is performed where the high order address bits are latched through the register to the address input of the external memory and then the data bits are coupled to the external memory device. If the default page value points to the most accessed portion of the external memory device, no paging is performed during access to that portion of the external memory and processing time is saved when reads or writes of data are made to that portion of the external memory.

Paged memory scheme

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Edgware, United Kingdom

Bipin Mistry