Cisco Technology, Inc.

Aayuna Inc.

Other

Lightwire, Inc.

Sioptical, Inc.

Saras-3d, Inc.

Bipin Dama

Kalpendu Shastri

Soham Pathak

Vipulkumar K Patel

Kishor V Desai

Ravinder Kachru

Mark Andrew Webster

Rao Yelamarty

Prakash B Gothoskar

David Piede

Alan Leonhartsberger

Utpal Kumar Chakrabarti

Anujit Shastri

Thomas Robert Daugherty

Kaushik Patel

Rutvij Dave

Chris Togami

Matthew Joseph Traverso

Kadaba Lakshmikumar

Paulius Mosinskis

Peter C Metz

Stefan Pfnuer

Bibhu Prasad Das

Mark Y Tse

Ankita Shastri

Passive alignment and connection between a fiber array and a plurality of optical waveguides terminating along an edge of a photonic IC (PIC) is provided by a controlled mating between alignment V-grooves formed in a fiber array support substrate and extra-array alignment ridges formed beyond the extent of a waveguide array integrated within the PIC. The height and width of the alignment ridges are formed to engage with the alignment V-grooves upon mating of the fiber array substrate with the PIC, providing passive alignment while maintaining a physical gap spacing g between the components (ensuring the integrity of the passive alignment).

Passively-aligned fiber array to waveguide configuration

Passive alignment and connection between a fiber array and a plurality of optical waveguides terminating along an edge of a photonic IC is provided by a controlled mating between V-grooves formed in a fiber support substrate and alignment ridges formed to surround waveguide terminations along an edge of a photonic IC. The V-grooves of the fiber support substrate are spaced to define the same pitch as the waveguides on the photonic IC, with the height and width of the alignment ridges formed to engage with the V-grooves upon mating of the fiber support substrate with the photonic IC. The individual fibers are positioned within associated V-grooves such that their endfaces are retracted from a proximal end portion of the support structure. It is this proximal end portion that mates with the alignment ridges on the photonic IC.

A 2D/3D conversion interface component is configured to override the video processing capabilities associated with a conventional 2D display, re-formatting an incoming 3D video stream into a version compatible with a 2D display while preserving the 3D-type of presentation. An incoming 'side-by-side' (SBS) 3D video stream is re-formatted into a 'frame sequential' (serialized) format that appears as a conventional video stream input to the 2D display. The interface component also generates as an output a timing signal (synchronized with the converted frames) that is transmitted to a 3D viewing device (e.g., glasses). Therefore, as along as the 3D viewing device remains synchronized with the sequence of frames shown on the 2D display, the user will actually be viewing an interactive 3D video.

User interface module for converting a standard 2D display device into an interactive 3D display device

A high density interconnect arrangement takes the form of a backplane-pluggable card, with electrical connections formed along a single (pluggable) edge and all remaining connections provided via optical fibers. An exemplary interconnect arrangement also includes on-board optical sources and silicon photonic-based circuitry for providing optical transceiver functionality. Passively aligned fiber arrays are utilized to provide I/O connections to external elements, as well as between laser sources and on-board silicon photonics.

High density opto-electronic interconnection configuration utilizing passive alignment

An optical transmitter may include a chip stack that includes an electrical IC that is mounted using solder balls to a photonic chip. These solder connections permit the electrical IC and the photonic chip to communicate. In addition, the transmitter may include a PCB coupled to the stack so that electrical signals in the PCB are transmitted to the IC and photonic chip (and vice versa). Instead of coupling the PCB to the stack using wire bonds attached to pads on a surface of the photonic chip, at least a portion of the PCB is disposed between the photonic chip and electrical IC. The PCB may also include bond pads used to form a direct solder connection to the electrical IC. As such, the electrical IC may include direct solder connections to both the PCB and the photonic chip.

Direct printed circuit routing to stacked opto-electrical IC packages

Embodiments herein describe a reference-less CDR circuit that receives electrical signals that may have been transmitted along either an electrical or optical interconnect which are then processed to identify the original data. To do so, the CDR circuit includes a frequency locking loop (FLL) and a phase locking loop (PLL) which generate control signals for a voltage controlled oscillator (VCO). In one embodiment, the FLL generates a coarse adjustment signal which the VCO uses to output a recovered clock that substantially matches the frequency of the received electrical signal. The PLL, on the other hand, generates a fine adjustment signal which the VCO uses to make small adjustments (e.g., half cycle phase shifts) to the recovered clock. The recovered clock outputted by the VCO is then fed back and used as an input in both the FLL and the PLL.

Reference-less clock and data recovery circuit

An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.

Molded glass lid for wafer level packaging of opto-electronic assemblies

An apparatus for providing single mode optical signal coupling between an opto-electronic transceiver and a single mode optical fiber array takes the form of a lens array and a ferrule component. The lens array includes a plurality of separate lens element disposed to intercept a like plurality of single mode optical output signal from the opto-electronic transceiver and provide as an output a focused version thereof. The ferrule component includes a plurality of single mode fiber stubs that are passively aligned with the lens array and support the transmission of the focused, single mode optical output signals towards the associated single mode optical fiber array.

Single mode fiber array connector for opto-electronic transceivers

A wafer scale implementation of an opto-electronic transceiver assembly process utilizes a silicon wafer as an optical reference plane and platform upon which all necessary optical and electronic components are simultaneously assembled for a plurality of separate transceiver modules. In particular, a silicon wafer is utilized as a 'platform' (interposer) upon which all of the components for a multiple number of transceiver modules are mounted or integrated, with the top surface of the silicon interposer used as a reference plane for defining the optical signal path between separate optical components. Indeed, by using a single silicon wafer as the platform for a large number of separate transceiver modules, one is able to use a wafer scale assembly process, as well as optical alignment and testing of these modules.

Wafer scale packaging platform for transceivers

An apparatus for providing self-aligned optical coupling between an opto-electronic substrate and a fiber array, where the substrate is enclosed by a transparent lid such that the associated optical signals enter and exit the arrangement through the transparent lid. The apparatus takes the form of a two-part connectorized fiber array assembly where the two pieces uniquely mate to form a self-aligned configuration. A first part, in the form of a plate, is attached to the transparent lid in the area where the optical signals pass through. The first plate includes a central opening with inwardly-tapering sidewalls surrounding its periphery. A second plate is also formed to include a central opening and has a lower protrusion with inwardly-tapering sidewalls that mate with the inwardly-tapering sidewalls of the first plate to form the self-aligned connectorized fiber array assembly. The fiber array is then attached to the second plate in a self-aligned fashion.

Self-aligning optical connector assembly

A configuration for routing electrical signals between a conventional electronic integrated circuit (IC) and an opto-electronic subassembly is formed as an array of signal paths carrying oppositely-signed signals on adjacent paths to lower the inductance associated with the connection between the IC and the opto-electronic subassembly. The array of signal paths can take the form of an array of wirebonds between the IC and the subassembly, an array of conductive traces formed on the opto-electronic subassembly, or both.

Enhanced low inductance interconnections between electronic and opto-electronic integrated circuits

An interposer (support substrate) for an opto-electronic assembly is formed to include a thermally-isolated region where temperature-sensitive devices (such as, for example, laser diodes) may be positioned and operate independent of temperature fluctuations in other areas of the assembly. The thermal isolation is achieved by forming a boundary of dielectric material through the thickness of the interposer, the periphery of the dielectric defining the boundary between the thermally isolated region and the remainder of the assembly. A thermo-electric cooler can be used in conjunction with the temperature-sensitive device(s) to stabilize the operation of these devices.

Interposer configuration with thermally isolated regions for temperature-sensitive opto-electronic components

An optical modulator is configured to include multiple modulating sections formed along each arm and create a unary-encoded optical output signal by driving the number of sections required to represent the data value being transmitted (e.g., three sections driven to represent the data value '3', four sections driven to represent the data value '4'). An auxiliary modulating section, isolated from the optical signal path, is included for creating a path for current flow in situations where only an odd number of modulating sections are required to represent the data. The activation of the auxiliary modulation section minimizes the current imbalance that would otherwise be present along a common node of the arrangement.

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Bridgewater, NJ, United States of America

Bipin Dama