Taiwan Semiconductor Manufacturing Comp. Ltd.

Bing-Syun Yeh

Ru-Gun Liu

Ying-Chou Cheng

Yi-Jie Chen

Feng-Yuan Chiu

I-Chang Shih

Shih-Ming Chang

Tsai-Sheng Gau

Wen-Chun Huang

Chun-Yu Lin

Ming-Hui Chih

Cheng-Cheng Kuo

Chia-Ping Chiang

Yu-Po Tang

Chia-Cheng Chang

Cheng-Lung Tsai

Cheng-Kun Tsai

Jeng-Shiun Ho

Wei-Long Wang

Chiu Hsiu Chen

Josh J H Feng

According to an exemplary embodiment, a method of forming a substrate pattern having an isolated region and a dense region is provided. The method includes the following operations: forming a first photoresist layer over the substrate; exposing the first photoresist layer through a first mask corresponding to the isolated region; developing the first photoresist layer to form a first pattern; forming a second photoresist layer over the substrate and the first pattern; exposing the second photoresist layer through a second mask corresponding to the substrate pattern; developing the second photoresist layer to form a second pattern; and etching the first pattern and the substrate to form the substrate pattern in the isolated region and the dense region.

Method of forming substrate pattern

A method for characterizing a three-dimensional surface profile of a semiconductor workpiece is provided. In this method, the three-dimensional surface profile is imaged from a normal angle to measure widths of various surfaces in a first image. The three-dimensional surface is also imaged from a first oblique angle to re-measure the widths of the various surfaces in a second image. Based on differences in widths of corresponding surfaces for first and second images, a feature height and sidewall angle are determined for the three-dimensional profile.

3D image profiling techniques for lithography

The present disclosure provides one embodiment of an integrated circuit (IC) design method. The method includes receiving an IC design layout having a plurality of main features; applying a main feature dissection to the main features of the IC design layout and generating sub-portions of the main features; performing an optical proximity correction (OPC) to the main features; performing a mask rule check (MRC) to a main feature of the IC design layout; and modifying one of the sub-portions of the main feature if the main feature fails the MRC.

Dissection splitting with optical proximity correction and mask rule check enforcement

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Hsinchu, Taiwan

Bing-Syun Yeh