Taiwan Semiconductor Manufacturing Comp. Ltd.

Bing J Sheu

Jiann-Tyng Tzeng

David Barry Scott

Chien-Hua Huang

Chee Wee Liu

Che-Yu Yeh

Sun-Rong Jan

A semiconductor device comprises a substrate with a first side and a second side, wherein a plurality of active circuits are formed adjacent to the first side of the substrate and a plurality of through silicon vias arranged in a polygon shape and extending from the first side of to the second side, wherein the polygon shape has more than six sides, and wherein each through silicon via is placed at a corresponding apex of the polygon shape.

Through silicon via layout pattern

A method for generating model files of target devices of an integrated circuit includes providing the target devices; providing a device target set for the target devices, wherein the device target set comprises target values of parameters of the target devices; determining a nearest known model related to the target devices, wherein the nearest known model comprises a first model file; performing a sensitivity analysis to determine sensitive parameters in the first model file; modifying the sensitive parameters in the first model file to generate a second model file; and determining a fitness value of a circuit simulated using the second model file with values of parameters in the device target set.

Generating models for integrated circuits with sensitivity-based minimum change to existing models

Growing community of inventors

Hsin-Chu, Taiwan

Bing J Sheu