Freescale Semiconductor,inc.

Newport Fab, LLC

Cirvine Corporation

Conexant Systems, Inc.

Sematech, Inc.

Fairchild Semiconductor Corporation

Other

Intel Corporation

Cornell Research Foundation Inc.

Skyworks Solutions, Inc.

Lucent Technologies Inc.

Rockwell Semiconductor Systems, Inc.

Nxp Usa, Inc.

Bin Zhao

Victor K Lee

Andrew Kameya

Maureen R Brongo

Jack Cornish

Prahalad K Vasudev

Brian Horng

Q Z Liu

Valery M Dubin

Chiu H Ting

David J Howard

Weizhuang Wayne Xin

Kenneth C Kwok

David Feiler

Qizhi Liu

Thomas E Seidel

Jan Krellner

Siqiang Fan

Phil N Sherman

Yosef Shacham-Diamand

Peter M Zeitzoff

Ronald S Horwath

David James Beebe

Jeffrey S Moore

Liming Tsau

King-Ning Tu

Yuhuan Xu

Yosi Shacham-Diamand

Yosi Schacham-Diamand

Melvin Desilva

Yosef Schacham-Diamand

Andrew M Kameya

The present disclosure is directed to a fast load transient response power supply system using dynamic reference voltage generation. A system may comprise, for example, at least power supply circuitry, voltage reference circuitry and dynamic reference generation circuitry. The power supply circuitry may be configured to generate an output voltage (e.g., for driving a load) based on a power supply input voltage. The voltage reference circuitry may be configured to generate a reference voltage for use in controlling the generation of the output voltage. The dynamic reference generation circuitry may be configured to generate a dynamic reference voltage as the input voltage for the power supply circuitry based on the reference voltage and the output voltage.

Fast load transient response power supply system using dynamic reference generation

A pulse width modulation (PWM) signal generator generates a PWM signal having a specified effective PWM duty resolution for a corresponding cycle window. The PWM signal generator receives an N-bit value representing a duty to be implemented and sets values X and Y to the M least significant bits and the N-M most significant bits, respectively, of the N-bit value. The value M can be determined based on the value N and a maximum implementable frequency of a clock signal used to time the generation of each PWM cycle. The PWM signal generator generates a cycle window of 2PWM cycles, each PWM cycle of the cycle window having a duty of either Y or Y+1. The number of PWM cycles in the cycle window having the duty Y+1 is based on the value X and the PWM cycles having a particular duty are contiguous within the cycle window.

Pulse width modulation with effective high duty resolution

Generally, this disclosure provides methods and systems for improved startup for DC-DC converters that reduce input voltage droop, in-rush current and output voltage jumps. The system may include a power stage circuitry including a plurality of power segments coupled in parallel, the power stage circuitry is coupled between an input voltage and output stage circuitry and configured to deliver power to a load coupled to the output stage circuitry. The system may further include PWM and power stage controller circuitry configured to sequentially and progressively activate the plurality of power segments to limit an input in-rush current from the input voltage during a ramp up period and output voltage at the output stage circuitry.

Startup of DC-DC converters utilizing multiple power segments

A system for scalable voltage ramp control for power supply systems. A system may comprise at least power supply circuitry, digital-to-analog (D/A) converter circuitry and a controller. The power supply circuitry may be configured to output a voltage to a load based on an input voltage provided by the D/A converter. The controller may be configured to control the D/A converter (e.g., to cause the D/A converter to provide the input voltage to the power supply circuitry) using a large range voltage ramp-up or a small range voltage ramp-up. Utilization of the large range voltage ramp-up or the small range voltage ramp-up by the controller may be based on, for example, a threshold voltage.

Scalable voltage ramp control for power supply systems

In one general aspect, a power supply circuit can include a power stage configured to be coupled to a power source and configured to deliver an output voltage to a load circuit, and can include a comparator coupled to the power stage and configured to receive a reference voltage. The power supply circuit can also include a hysteresis control circuit configured to receive at least one of a feedback voltage or a reference voltage and configured to change a hysteresis of the comparator in response to the at least one of the feedback voltage or the reference voltage during a soft-start of the power supply circuit.

Apparatus and methods of soft-start in a hysteretic power converter

In one general aspect, an apparatus can include a controller, and a power stage coupled to the controller and configured to be coupled to a power source. The power stage is configured to deliver an output voltage to a load module in response to the controller. The apparatus also includes a reference voltage circuit coupled to the controller and configured to be grounded to a first ground voltage different from a second ground voltage associated with the load module.

Differential sensing for voltage control in a power supply circuit

First information is received at a first pulse width modulation (PWM) module responsive to a chip select signal being asserted at a chip select input of a communication bus of the first PWM module during a first time. The first information is latched at a control register of the first PWM module in response to a first logic transition of the chip select signal. A first PWM signal is provided at a first output of the first PWM module beginning a predetermined amount of time after the first logic transition of the chip select signal, the first PWM signal generated by the first PWM module based upon the first information.

Phase-shifted pulse width modulation signal generation device and method therefor

A light emitting diode (LED) system implements a power management technique. The LED system includes a plurality of LED drivers connected in series, each LED driver configured to regulate the current flowing through a corresponding subset of a plurality of LED strings. Each LED driver determines the tail voltages of the one or more LED strings of the corresponding subset. Each LED driver, except for the first LED driver in the series, also receives a voltage representative of the minimum tail voltage of the other subsets regulated by the upstream LED drivers. Each LED driver then provides the lowest of the voltage received from the upstream LED driver and the one or more tail voltages of the corresponding subset to the downstream LED driver. In this manner a voltage representative of the minimum tail voltage of the plurality of LED strings is cascaded through the series. A feedback controller monitors the minimum tail voltage represented by this cascaded voltage and accordingly adjusts an output voltage provided to the head ends of the plurality of LED strings.

Serial cascade of minimium tail voltages of subsets of LED strings for dynamic power control in LED displays

A PWM generation module generates a PWM data signal used to control a light emitting diode (LED) driver for one or more strings of LEDs of a display device. The PWM data signal is synchronized with the frame boundaries of the video content being displayed. The PWM generation module can configure the PWM data signal such that a new PWM cycle is initiated at the start of each successive frame, and further whereby those PWM cycles that would be prematurely terminated at frame boundaries are instead driven at a constant reference level until the frame boundary. With this configuration, a substantially linear average light intensity can be achieved across frames, thereby reducing or eliminating display distortion that is often present in other PWM cycle synchronization techniques. The PWM generation module can use a self-learning process to make adjustments to the expected number of completeable PWM cycles per frame in response to dynamic changes in the frame rate, PWM frequency, or other related display parameters.

Frequency synthesis and synchronization for LED drivers

An analog-to-digital converter (ADC) implements non-uniform conversion accuracy so as to allow for high conversion accuracy for a select narrower input range while also accommodating a wider overall input range and requiring fewer conversion bits compared to conventional ADCs. The ADC includes an ADC core that receives an input signal and outputs a first digital value having a first number of bits, the first digital value based on the input signal and an accuracy configuration of the ADC core. The ADC also includes an encoder to generate a second digital value have a second number of bits, greater than the first number of bits, based on the first digital value and the accuracy configuration of the ADC core. The ADC further includes an accuracy controller to adjust the accuracy configuration of the ADC core based on a relationship between the first digital value and at least one threshold.

Analog-to-digital converter with non-uniform accuracy

Disclosed are example techniques for frame-based power management in a light emitting diode (LED) system having a plurality of LED strings. A voltage source provides an output voltage to drive the LED strings. An LED driver generates a frame timing reference representative of the frame rate or display timing of a series of image frames to be displayed via the LED system. An update reference is generated from the frame timing reference. The LED driver monitors one or more operating parameters of the LED system. In response to update triggers marked by the update reference, the LED driver adjusts the output voltage of the voltage source based on the status of each of the one or more monitored operating parameters (either from the previous update period or determined in response to the update trigger), thereby synchronizing the updating of the output voltage to the frame rate (or a virtual approximation of the frame rate) of the video being displayed.

LED driver with frame-based dynamic power management

A pulse width modulation (PWM) signal generator generates multiple output PWM signals from an input PWM signal. The output PWM signals are synchronized to synchronization events. Each output PWM signal has a duty ratio substantially equal to the duty ratio of the input PWM signal, and each output PWM signal has a fixed phase-shift in relation to the other output PWM signals. The PWM signal generator samples an input PWM cycle to determine sample parameters representative of its duty ratio. The sample parameters are then used to generate a corresponding output PWM cycle for each of the output PWM signals. In response to a synchronization event, the PWM signal generator prematurely terminates the current PWM cycle and initiates the next PWM cycle while ensuring that the portion of the current output PWM cycle completed by the leading output PWM signal up to the point of the premature termination is replicated for the corresponding output PWM cycles of the other non-leading output PWM signals.

Synchronized phase-shifted pulse width modulation signal generation

A pulse width modulation (PWM) frequency converter converts an input PWM signal to an output PWM signal having a different frequency while maintaining a substantially equal duty ratio. The PWM frequency converter samples the input PWM signal for a PWM cycle using a sampling clock. A filter module filters the resulting set of one or more PWM parameters to compensate for noise introduced by potential clock mismatch, clock jitter, ambient variations, and other non-deterministic issues, thereby generating filtered PWM parameters. The sampling employed by the filter module compares a difference between the one or more current PWM parameters and previous (or historical) PWM parameters from an earlier sampled PWM cycle to a predetermined change threshold in determining a filtered set of one or more PWM parameters. The filtered set of one or more PWM parameters then is used to generate one or more corresponding PWM cycles of the output signal.

Pulse width modulation frequency conversion

A power management technique in a light emitting diode (LED) system is disclosed. The LED system includes a plurality of LED driver connected in series, each LED driver configured to regulate the current flowing through a corresponding subset of a plurality of LED strings. Each LED driver determines the minimum tail voltage of the LED strings of the corresponding subset, compares the determined minimum tail voltage with an indicator of a minimum tail voltage of one or more other subsets provided from an upstream LED driver in the series, and then provides an indicator of the lower of the two tail voltages to the downstream LED driver. In this manner an indicator of the minimum tail voltage of the plurality of LED strings is cascaded through the series. A feedback controller monitors the minimum tail voltage represented by the cascaded indicator and accordingly adjusts an output voltage provided to the head ends of the plurality of LED strings.

Serial configuration for dynamic power control in LED displays

A pulse width modulation (PWM) signal generator generates a PWM signal with an adjustable PWM duty based on a programmable or otherwise adjustable value. In response to a change or update to this value, the PWM signal generator initiates a duty transition process that generates a series of groups of PWM cycles that gradually transition from the original duty to the new duty. Each group includes a corresponding set of a predetermined number of PWM cycles that is repeated one or more times over a predetermined duration for the group. Each set has a certain proportion of PWM cycles having the new duty to PWM cycles having the original duty, whereby the proportion increases for each successive group of the series. This gradual transition in the PWM signal from the original duty to the new duty effectively provides an effective higher duty resolution for the PWM signal generator during the duty transition.

Duty transition control in pulse width modulation signaling

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Irvine, CA, United States of America

Bin Zhao