Shanghai Jiao Tong University

Shanghai Sixth People's Hospital

Silicon Storage Technology, Inc.

Glenfly Tech Co., Ltd.

Bin Sheng

Weiping Jia

Huating Li

Xiaozhou Qian

Yao Zhou

Liang Wu

Ling Dai

Tao Wang

Yu Wang

Jian Zhou

Jing Xie

Kai Man Yue

Wenwei Xu

Ning Bai

Yaohua Zhu

Jiaxu Peng

Xuhong Hou

Ruhan Liu

Zhifeng Mao

Yaxin Shen

Fei Gou

Siyuan Pan

Lu Guo

Kaiman Yue

A pixel circuit includes a drive transistor, a data writing module, a storage module, and a light emitting control module; a first terminal of the storage module is configured to receive a first power supply voltage signal, and a second terminal of the storage module is configured to be connected to a control electrode of the drive transistor; a first terminal of the data writing module is configured to receive a data signal, and a second terminal of the data writing module is configured to be connected to the control electrode of the drive transistor; a substrate of the drive transistor is configured to receive a second voltage signal, a first electrode of the drive transistor is configured to receive the first power supply voltage signal, and a second electrode of the drive transistor is configured to be connected to at least partial light emitting control module.

Pixel circuit, display panel and brightness compensation method thereof

Method of determining insulin injection amount, computer storage medium, and devices, the method includes including: obtaining characteristic information and a blood glucose content at a current time of a target user; and determining an insulin injection amount at each time of the target user based on the characteristic information of the target user, the blood glucose content at the current time of the target user, a predetermined blood glucose prediction model, and a predetermined insulin injection amount prediction model. The method can facilitate the determination of the insulin injection amount at each time.

Methods of determining insulin injection amount, computer storage mediums and devices

A method of fundus oculi image analysis includes acquiring a target fundus oculi image; analyzing the target fundus oculi image by a fundus oculi image analysis model determined by training to acquire an image analysis result of the target fundus oculi image; and the fundus oculi image analysis model includes at least one of an image overall grade prediction sub-model and an image quality factor sub-model. The method performs quality analysis on the target fundus oculi image by the fundus oculi image analysis model, and when the model includes the overall grade prediction sub-model, a prediction result of whether the target fundus oculi image as a whole is gradable can be acquired; when the model includes the image quality factor sub-model, the analysis result of the fundus oculi image quality factor can be acquired and the image analysis model is determined by extensive image training, and the reliability of the result of whether the image is gradable determined based on the above model is high.

Method, computer device and storage medium of fundus oculi image analysis

Methods of segmenting an abdominal image, computer apparatuses and storage mediums. The method includes acquiring an abdominal image to be examined; and classifying pixels in the abdominal image to be examined based on a trained full convolution neural network, and determining a segmented image corresponding to the abdominal image to be examined, wherein the trained full convolution neural network is trained and determined based on a first training set and a second training set, the first training set includes first sample abdominal images and pixel classification label images corresponding to the first sample abdominal images, the second training set includes second sample abdominal images and the number of pixels of second sample abdominal images correspondingly belong to each class. Through the methods herein, the accuracy of the segmentation can be improved.

Methods of segmenting an abdominal image, computer apparatuses, and storage mediums

A fundus image processing method comprising: receiving a collected fundus image; identifying the fundus image via a first neural network to generate a first feature set of the fundus image; identifying the fundus image via a second neural network to generate a second feature set of the fundus image, wherein the first feature set and the second feature set indicate different lesion attributes of the fundus image; combining the first feature set and the second feature set to obtain a combined feature set of the fundus image; and inputting the combined feature set into a classifier to obtain a classification result.

Fundus image processing method, computer apparatus, and storage medium

A method of automatically detecting microaneurysm based on multi-sieving convolutional neural network (CNN), includes the following steps of: A), partitioning an image to be detected using random fern and obtaining an auxiliary channel image of the image according to a first partition result; and A), inputting the auxiliary channel image obtained from step A) and the image to a multi-sieving CNN training model to perform a detection and obtaining a microaneurysm detection result of the image. The process of establishing the training model includes: B), using a current microaneurysm diagnostic report as samples and partitioning a lesion image in the microaneurysm diagnostic report using the random fern, and establishing the auxiliary channel image according to a second partition result; B), comparing the obtained auxiliary channel image with a lesion-marked image of pixels, clarifying the samples according to a comparing result and performing the multi-sieving CNN training.

Method of automatically detecting microaneurysm based on multi-sieving convolutional neural network

The present invention relates to an improved sense amplifier for reading values in flash memory cells in an array. In one embodiment, a sense amplifier comprises an improved pre-charge circuit for pre-charging a bit line during a pre-charge period to increase the speed of read operations. In another embodiment, a sense amplifier comprises simplified address decoding circuitry to increase the speed of read operations.

Sense amplifier with bit line pre-charge circuit for reading flash memory cells in an array

A self-timer for a sense amplifier in a memory device is disclosed.

Self-timer for sense amplifier in memory device

A bitline regulator for use in a high speed flash memory system is disclosed. The bitline regulator is responsive to a set of trim bits that are generated by comparing the bias voltage of a bitline to a reference voltage.

Bitline regulator for high speed flash memory system

Growing community of inventors

Shanghai, China

Bin Sheng