Freescale Semiconductor,inc.

Nxp Usa, Inc.

Bin Feng

Liang Qiu

Xiaolei Wu

Bin Sai

Shuwei Wu

Meng Liu

A mass storage system for storing mass data generated by a mass data source. The system includes a data buffer coupled to the mass data source, and a file system and command generator. The data buffer caches the mass data. The file system and command generator generates file system data corresponding to the mass data stored in the data buffer. The file system and command generator also automatically configures a SATA host controller so that the SATA host controller will move the cached mass data and the generated file system data to a mass storage device.

Mass storage system and method of storing mass data

In a touch interface, a sensor provides an output signal that is a function of a sensed capacitance. The sensor includes a charger for repetitively applying first and second voltages to charge the sensed capacitance to first and second charge values in first and second phases respectively. A sampler includes a first current mirror for providing first and second sample current signals that are a function of the first and second charge values respectively. An accumulator uses an accumulator signal to provide the output signal. The accumulator repetitively uses the first and second sample current signals differentially to modify a charge on an accumulator capacitor and provide the accumulator signal. The accumulator signal is a progressive function of the sensed capacitance but cancels noise in the first and second sample signals at frequencies less than a repetition rate of operation of the accumulator.

Capacitance sensor with noise rejection

A spread-spectrum clock (SSC) generator for generating an SSC signal. The SSC generator has a first up/down counter that operates for a fixed, first duration (t1), a first PRBS generator that operate for a variable, second duration (t2), a second up/down counter that operates for a fixed, third duration (t3), and a second PRBS generator that operates for a variable, fourth duration (t4). A state machine sequentially triggers the first counter and the first PRBS generator to generate a positive portion of a cycle of the SSC signal and then sequentially triggers the second counter and the second PRBS generator to generate a negative portion of the cycle of the SSC signal. For a set of parameters stored in configurable registers, the first and third durations are fixed from cycle to cycle, while the second and fourth durations vary from cycle to cycle.

Growing community of inventors

Tianjin, China

Bin Feng