International Business Machines Corporation

Billy L Crowder

John M Aitken

Stephen Edward Greco

Klaus D Beyer

Arnold Reisman

Perwaiz Nihal

James Cleary McGroddy

Joseph M Blum

Fritz H Gaensslen

Stanley Zirinsky

Shahzad Akbar

Douglas William Ormond, Jr

William Ralph Hunter

Asif Iqbal

Richard C Jaeger

Fabrication methods for forming a network of walls concurrently with the formation of studs for interconnecting plural device layers of a large scale integrated circuit device permits aggressive reduction of the average dielectric constant of air dielectric structures. Wall sections may be positioned to laterally support high aspect ratio connecting studs with a network of open or closed polygons. Wall patterns may also be open from layer to layer to allow formation of large scale air dielectric structures over a plurality of layers in a single material removal step. A wide range of shear strengths and reductions of average dielectric constant can be achieved even within a single device layer of a large scale integrated circuit and exploited to meet circuit design and device fabrication process requirements.

Large scale IC personalization method employing air dielectric structure

Larce scale IC personalization method employing air dielectric structure

A method of fabricating a micro-coaxial wiring structure comprises forming a first insulation layer and patterning a trench therein. A first conductive layer is formed on the first insulation layer and having a shape conforming to the insulation layer and lining the trench. A second insulation layer is formed on the first conductive layer within the trench and having a shape conforming to the first conductive layer lining the trench. A conductive signal line having a predetermined aspect ratio for providing a desired value of resistance per unit length is formed on the second insulation layer within the trench. A third insulation layer is then formed. Lastly, a conductive shielding line is formed upon the third insulation layer, the conductive shielding line being aligned with the conductive signal line.

Method of Fabricating a micro-coaxial wiring structure

An improved interconnection for semiconductor integrated circuits is provided by a member made of doped polycrystalline silicon and metal silicide that provides the simultaneous advantages of high conductivity and reduced overlap capacitance in multilayer integrated circuit devices. Such interconnecting members are useable to produce field effect transistor type devices.

Semiconductor integrated circuit interconnections

Doped polysilicon silicide semiconductor integrated circuit

The sensitivity of the threshold voltage in MOSFET devices to changes in substrate voltage may be reduced at a given temperature by the introduction of sufficiently deep energy level, low diffusivity impurities into the depletion region under the gate of the MOSFET.

MOSFET Substrate sensitivity control

A method for providing on a substrate a layer of a metal silicide such as molybdenum silicide and/or tantalum silicide and/or tungsten silicide and/or rhodium silicide which includes coevaporating silicon and the respective metal onto a substrate, and then heat treating the substrate to form the metal silicide.

Method for providing a metal silicide layer on a substrate

A method of manufacturing semiconductor devices of the type wherein regions of oxide such as silicon oxide recessed or inset in a silicon substrate are formed by oxidation of the silicon with the use of a masking layer protecting locally against the oxidation. In order to prevent the formation of a projecting oxide beak under the masking layer a nitride oxidation mask is applied directly to the substrate which has been previously ion-implanted to a controlled depth and then annealed to generate a dense dislocation network array on the substrate surface to prevent mechanical stress defects which normally would occur when a nitride mask is applied directly to a substrate.

Method of manufacturing semiconductor devices in which oxide regions are

A method for improving the current confinement capacity of a double heterojunction laser by using a high energy implantation of oxygen in the regions of an injection laser surrounding the active region of such laser so as to make such regions semi-insulating.

Growing community of inventors

Putnam Valley, NY, United States of America

Billy L Crowder