Netlogic Microsystems, Inc

Globespan Virata Corporation

Conexant, Inc.

Bijit Halder

Joseph N Babanezhad

Alper Tunga Erdogan

Chung-Li Lu

Tzu-Hsien Sang

A circuit for the analog correlation of a signal to remove impairments such as echo, cross talk and intersymbol interference is described. A duplexing circuit which improves echo response by providing a second transformer is described.

Systems, circuits and methods for dual transformer duplexing

A circuit for the analog correlation of a 2.5 GHz signal to remove impairments such as echo, cross talk and intersymbol interference is described. Loop stability in a loop which generates an error signal and tap weights is achieved by providing a further delay from the taps of the delay line.

Delay line correlator

According to an embodiment of present invention, an algorithm for computing static pre-equalizer coefficients, comprises the steps of determining a length of algorithm iterations; calculating a feedforward coefficient vector associated with a feedforward equalizer; calculating a pre-equalizer coefficient vector associated with a pre-equalizer filter; and performing the steps of calculating for the length of the algorithm iterations; wherein a mean square of an error between an output sequence and a transmitted digital input sequence is minimized.

Method and system for computing pre-equalizer coefficients

An embodiment of the present invention is related to an analog-to-digital converter comprising a polyphase combiner comprising at least a first combiner filter and a second combiner filter for receiving a plurality of inputs and generating a combined signal. The analog-to-digital converter also comprises a multistage decimator structure for receiving the combined signal and generating a digital sigma-delta output, the multistage decimator structure comprising at least a first decimator comprising a first integrator filter; a first downsampling block and a first differentiator; and a second decimator comprising a second integrator filter; a second downsampling block and a second differentiator.

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Santa Clara, CA, United States of America

Bijit Halder