Fairchild Semiconductor Corporation

Semiconductor Components Industries, LLC

Bigildis Dosdos

Chung-Lin Wu

Jerome Teysseyre

Romel Nogas Manatad

Steven Paul Sapp

Oseob Jeon

Maria Cristina Estacio

Erwin Ian Almagro

Eddy Tjhia

Suresh Belani

Jeongil Lee

Charles Suico

David Chong Sook Lim

Adriano M Vilas-Boas

Sunggeun Yoon

Myoungho Lee

Jeffrey P Gambino

Daniel Marvin Kinzer

Dean E Probst

Peter Austin Burke

David T Price

Maria Clemens Ypil Quinones

Jeffery Allen Neuls

Erwin Ian Vamenta Almagro

Santosh Menon

Edwin Man Fai Lee

Lee Man Fai Edwin

A semiconductor device package may include a leadframe having a first portion with first extended portions and a second portion with second extended portions. Mold material may encapsulate a portion of the leadframe and a portion of a semiconductor die mounted to the leadframe. A first set of contacts of the semiconductor die may be connected to a first surface of the first extended portions, while a second set of contacts may be connected to a first surface of the second extended portions. A mold-locking cavity having the mold material included therein may be disposed in contact with a second surface of the first extended portions opposed to the first surface of the first extended portions, a second surface of the second extended portions opposed to the first surface of the second extended portions, the first portion of the leadframe, and the second portion of the leadframe.

Molded packaging for wide band gap semiconductor devices

In a general aspect, an apparatus can include a leadframe including a plurality of leads disposed along a single edge of the apparatus. The apparatus can also include an assembly including a substrate and a plurality of semiconductor die disposed on the substrate, the assembly being mounted on the leadframe and an inductor having a first terminal and a second terminal. The first terminal of the inductor can be electrically coupled with the leadframe via a first contact pad of the leadframe. The second terminal of the inductor can be electrically coupled with the leadframe via a second contact pad of the leadframe. The first contact pad and the second contact pad can be exposed through a molding compound by respective mold cavities defined in the molding compound. The leadframe, the assembly and the inductor can be arranged in a stacked configuration.

Vertical and horizontal circuit assemblies

In a general aspect, an apparatus can include a leadframe including a plurality of leads disposed along a single edge of the apparatus. The apparatus can also include an assembly including a substrate and a plurality of semiconductor die disposed on the substrate, the assembly being mounted on the leadframe and an inductor having a first terminal and a second terminal. The first terminal of the inductor can be electrically coupled with the leadframe via a first conductive clip, where the first terminal of the inductor can be coupled with a contact pad of the first conductive clip. The second terminal of the inductor can be electrically coupled with the leadframe via a second conductive clip, where the second terminal of the inductor can be coupled with a contact pad of the second conductive clip. The leadframe, the assembly and the inductor can be arranged in a stacked configuration.

A stacked assembly of semiconductor devices includes a mounting pad covering a first portion of a low-side semiconductor device, and a contact layer covering a second portion of the low-side semiconductor device. A first mounting clip electrically connected to the contact layer has a supporting portion joining the first mounting clip to a first lead frame portion. A second mounting clip attached to the mounting pad has a supporting portion joining the second mounting clip to a second lead frame portion. A high-side semiconductor device has a first terminal electrically connected to the first mounting clip and thereby to the contact layer, and a second terminal electrically connected to the second mounting clip.

Stacked transistor assembly with dual middle mounting clips

In one general aspect, an apparatus can include a leadframe including a plurality of leads configured to provide electrical connections for the apparatus. The apparatus can also include a semiconductor die disposed on the leadframe and a conductive clip electrically coupling the semiconductor die with the leadframe. The apparatus can further include a heat slug disposed on the conductive clip. The heat slug can include a thermally conductive and electrically insulative material.

Semiconductor device assemblies

In a general aspect, an apparatus can include a leadframe including a plurality of leads configured to be coupled with a printed circuit board. The plurality of leads can be disposed along a single edge of the apparatus. The apparatus can also include an assembly including a substrate and a plurality of semiconductor die disposed on the substrate. The assembly can being mounted on the leadframe. The apparatus can further include an inductor having a first terminal and a second terminal. The first terminal of the inductor can being coupled with the leadframe via a first contact pad, and the second terminal of the inductor can be coupled with the leadframe via a second contact pad. The leadframe, the assembly and the inductor can be arranged in a stacked configuration.

A first embodiment is a common drain+clip. It has a conventional drain contact on its bottom surface and is flip chip mounted on a half-etched leadframewhich has external source, gate and drain contacts connected to the sources, gate and common drain of the die. Common drain clipconnects the drainto external contacts between opposite gate contacts. A second embodiment is a direct drain embodiment+heatslug. The devicehas a top drain contactthat extends to the common drainacross the bottom of the die which is flip chip mounted to a half-etched leadframe having external source, gate and drain contacts connected to the sources, gates and common drain of the die

Common drain power clip for battery pack protection mosfet

The multi-chip leadless modulehas integrated circuit (IC), dual n-channel mosfet, IC leads, gate leads, and source leads-encapsulated in resin. The ICand the dual n-channel mosfetare mounted face down on the leads. IC leadsare made of planar metal and connect, respectively, to the electrodes TEST, VDD and VM on the ICusing a flip chip technique to assemble the leads on copper pillars or copper studs.

Multi-chip module power clip

Systems and methods of fabricating Wafer Level Chip Scale Packaging (WLCSP) devices with transistors having source, drain and gate contacts on one side of the transistor while still having excellent electrical performance with low drain-to-source resistance R(on) include using a two-metal drain contact technique. The R(on) is further improved by using a through-silicon-via (TSV) technique to form a drain contact or by using a copper layer closely connected to the drain drift.

Vertical MOSFET transistor having source/drain contacts disposed on the same side and method for manufacturing the same

An exemplary semiconductor die package of the invention has a metal-oxide substrate disposed between a first surface of a semiconductor die and a heat-sinking component, with a conductive die clip or one or more electrical interconnect traces disposed between the metal-oxide substrate and the first surface of the semiconductor die. The heat-sinking component may comprise a heat sink, or an adaptor plate to which a heat sink may be coupled. The conductive die clip or electrical trace(s) provides electrical connection(s) to the first surface of the semiconductor die, while the metal-oxide substrate electrically insulates the die from the heat-sinking component, and provides a path of high thermal conductivity between the die and the heat-sinking component. The second surface of the semiconductor die may be left free to connect to a circuit board, or a leadframe or interconnect substrate may be attached to it.

High-power semiconductor die packages with integrated heat-sink capability and methods of manufacturing the same

A multi-chip module suitable for use in a battery protection circuit. The multi-chip module includes an integrated circuit chip, a first power transistor, a second power transistor, a first connection structure electrically coupling the integrated circuit chip to the first power transistor, a second connection structure electrically coupling the integrated circuit chip to the second power transistor, and a leadframe structure comprising a first lead, a second lead, a third lead and a fourth lead, wherein the integrated circuit chip, the first power transistor, and the second power transistor are mounted on the leadframe structure. A molding material covers at least part of the integrated circuit chip, the first power transistor, the second power transistor, the first connection structure, and the second connection structure.

Growing community of inventors

San Jose, CA, United States of America

Bigildis Dosdos