Texas Instruments Corporation

Rf Magic, Inc.

Sdrf Eurl

Conexant Systems, Inc.

Pharrowtech Bv

Biagio Bisanti

Stefano Cipriani

Francesco Coppola

Gianni Puccio

Eric Duvivier

Lorenzo Carpineto

Martin Alderton

Lysiane Koechlin

Rémi Artinian

Francois Marot

Vanessa Bedero

Akbar Ali

Pascal Guignon

Khaled Khalaf

Qixian Shi

Ahmet Tekin

Vanessa Bodrero

A method for calibrating a radio transceiver begins by injecting a low-frequency tone at a transmit power amplifier input of the radio transceiver, where the low frequency tone is at least an order of magnitude lower than the operating frequency of a local oscillator coupled to the transmitter input. The method continues by upconverting the low-frequency tone to produce a plurality of tones at a transmit power amplifier output and then determining which tone of the plurality of tones is a local oscillator feedthrough tone associated with a transmit power amplifier output and which tone of the plurality of tones is representative of an in-phase and quadrature (I/Q) imbalance associated with the transmit power amplifier output. The method continues by determining a DC offset, based on the local oscillator feedthrough tone, where the DC offset is representative of local oscillator feedthrough in the transmit power amplifier output and finally determining, based on the tone representative of an I/Q imbalance, an I/Q offset associated with the transmit power amplifier output.

Millimeter wave radio calibration circuit

Variable frequency oscillators allowing wide tuning range and low phase noise is disclosed. In an illustrative embodiment, a first transistor has a first terminal (e.g. collector) connected to a reference voltage, and a second terminal (e.g. emitter) connected to a first terminal of a first current source and to ground. The first transistor further has a third terminal connected to a first inductor and to a first capacitor connected to the emitter of the first transistor and also to a second capacitor connected to ground. A second transistor is similarly constructed. In order to achieve a variable frequency oscillation between the emitters of the two transistors, a variable tank capacitor is connected between the inductors, forming a circuit connecting in series all passive components composing the LC tank, masking most of parasitic capacitances.

Variable frequency oscillator having wide tuning range and low phase noise

Multi-loop PLL structure for generating an accurate and stable frequency over a wide range of frequencies

A tunable multiple frequency source system employing offset signal phasing includes a first frequency source, a phase delay element, and a second frequency source configured to operate concurrently with the first frequency source. The first frequency source includes an input coupled to receive a reference input signal and an output for providing a first frequency source signal. The phase delay includes an input coupled to receive the input reference signal, and an output, the phase delay element operable to apply a predefined phase delay to the input reference signal to produce a phase-delayed input signal. The second frequency source includes an input coupled to receive the phase-delayed input signal and an output for providing a second frequency source signal.

Offset signal phasing for a multiple frequency source system

A multiple frequency source system includes at least one frequency source tunable to a predefined target frequency, and at least one additional frequency source operable to generate a second signal at a frequency which is either higher or lower than the target frequency. A method for tuning the tunable frequency source to the target frequency during concurrent generation of the second signal includes (i) controlling the tunable frequency source to tune to at least one frequency point frequency lower than the target frequency, and thereafter controlling the oscillator to tune to the target frequency, when the second signal is higher in frequency than the target frequency, or (ii) controlling the tunable frequency source to tune to at least one frequency point higher than the target frequency, and thereafter controlling the tunable frequency source to tune to the target frequency, when the second signal is lower in frequency than the target frequency.

Multiple frequency source system and method of operation

A first receiver frequency reference is passively coupled to a second receiver by tapping a signal directly from the resonant element, such as a crystal, of an oscillator in the first receiver to drive the input of the second receiver. The sinusoidal signal from the resonant element is relatively free of harmonics and minimizes interference that could be caused by harmonics of a square wave signal coupling or an amplified signal. The oscillator of each receiver can be selectively enabled or disabled to allow the receiver to either generate or receive the frequency reference. This technique of coupling can be used to couple a frequency reference signal between integrated circuit receivers.

Oscillator coupling to reduce spurious signals in receiver circuits

A method for mitigating phase pulling in multiple frequency source system includes generating a first signal, the first signal referred to as an existing signal operating at an existing frequency point, the existing signal having a predefined pulling bandwidth around the existing frequency point. A request is received to generate a prospective signal at a prospective frequency point which is within the predefined pulling bandwidth of the existing signal. The prospective frequency is removed from within the predefined pulling bandwidth, and the prospective and existing signals are generated at the corresponding frequency points.

System and method for mitigating phase pulling in a multiple frequency source system

A phase lock loop circuithas a phase frequency detector, a charge pump, an active filterand a voltage-controlled oscillator. The phase detector generates UP and DN signals indicative of the relative frequency of F, a reference signal, and F, a signal controlled by the voltage-controlled oscillator. A charge pump using logic gates (bufferand inverter) to produce a voltage drop over resistorsandto generate a voltage at a node coupled to the input of transmission gateaccording to the values of the UP and DN signals. When the transmission gateis closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifierof the active filter. When the transmission gate is open (high impedance state) the inverting input is electrically isolated from the node.

Charge pump phase locked loop

A transmitter architecture () provides for a stable and low noise modulator where the modulation bandwidth is uncorrelated to the TX loop bandwidth. The output signal () of the TX loop is demodulated by a demodulator () and the demodulated signal is compared by a comparator () with the modulating input signal (). The output of the comparator is then used to adjust a digital pre-emphasis filter () which preconditions the modulating input signal () in the digital domain. The preconditioning approach of the present invention provides for low noise because the transmitter designer can chose a narrow band for the TX loop which will also filter out the noise coming from the additional synthesizer () used to down convert the input signal.

Radio frequency modulator

A phase lock loop circuit () has a phase frequency detector (), a charge pump (), an active filter () and a voltage-controlled oscillator (). The phase detector generates signals responsive to reference signal Fand VCO output signal F. A charge pump generates a voltage at the input of a first transmission gate () according to the values of the phase detector signals. A predetermined voltage is generated at the input of a second transmission gate (). When the transmission gates () are closed (low impedance) the charge pump may sink or source current to the inverting input of the operational amplifier () of the active filterand the predetermined voltage is applied to the non-inverting input. When the transmission gates are open (high impedance state) the inverting input is electrically isolated from the node and the non-inverting output is isolated from the power supply.

Charge pump phase locked loop with improved power supply rejection

A voltage controlled oscillator ( ) includes an LC tank ( ) and a capacitor bank ( ). LC tank ( ) includes an inductor ( ) and a varactor ( ). The capacitive output of the varactor is controlled by a control voltage &ngr;. To electronically tune the voltage controlled oscillator, a set of capacitors ( ) in the capacitor bank ( ) are enabled by a digital control signal based on a frequency comparison with a desired frequency. Once the capacitor bank is set, the frequency can be locked at the desired frequency by the phase lock loop.

Tuning circuit having electronically trimmed VCO

A phase-lock loop (PLL) filter architecture includes a first charge pump ( ) and a second change pump ( ). The second charge pump ( ) operates in opposite phase of the first charge pump ( ) in order to take away excess charge from the loop filter capacitor(s). By using a second charge pump as described, the PLL filter does not require the use of a large capacitor and can therefore be integrated.

Loop filter architecture

A D flip-flop circuit operating in master-slave configuration which has low power consumption and is capable of high-speed operation, and a method for lowering power consumption in such a circuit is provided. The circuit embodiment includes two latches, each with a switching and memory section, and two interlaced current sources. In response to the active high clock signal the master latch memory section uses the current from the first current source while the slave latch switching section uses the current from the second current source, and vice versa. The switching section of each latch is biased with a higher current than the memory section, to provide the circuit with low power consumption. The output current provided to the switching section is preferably substantially twice the magnitude of the current provided to the memory section. The ratio of the currents of the current sources for the switching and memory section is preferably in the range of about 30% to 70%, depending on the clock frequency.

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Antibes, France

Biagio Bisanti