Taiwan Semiconductor Manufacturing Comp. Ltd.

Bi-Trong Chen

Syun-Ming Jang Jang

Tien-I Bao

Lain-Jong Li

Lih-Ping Li

Tien I Bao

Shu E Ku

Yung-Cheng Lu

Tai-Chun Huang

Ying-Ho Chen

Chih-Hsiang Yao

Yih-Hsiung Lin

A structure for a multi-level interconnect inter-level dielectric layer (ILD), a method of manufacturing thereof, and a semiconductor device including the ILD layer. The ILD layer includes a first low-dielectric constant material sub-layer, and a second low-dielectric constant material sub-layer disposed over the first low-dielectric constant material sub-layer. The second low-dielectric constant material sub-layer has at least one different material property than the first low-dielectric constant material sub-layer. A third low-dielectric constant material sub-layer is disposed over the second low-dielectric constant material sub-layer, the third low-dielectric constant material sub-layer having at least one different material property than the second low-dielectric constant material sub-layer. The first, second and third low-dielectric constant materials sub-layers are preferably comprised of the same material, deposited continuously in one or more deposition chambers while the deposition conditions such as the gas flow rate, power, or gas species are adjusted or changed.

Integration film scheme for copper / low-k interconnect

A new method is provided for the creation of dummy plugs in support of creating a robust structure of overlying interconnect traces. A pattern of holes for dummy plugs is etched stopping at an etch stop layer, the etch stop layer is then removed from the bottom of the holes that have been created whereby this removal is extended into an underlying layer of insulating material. The pattern of holes is filled with a metal, preferably copper, excess metal is removed by methods of Chemical Mechanical Polishing, leaving in place a pattern of metal plugs that penetrate through layers of insulation material and through layers of etch stop material and into an underlying layer of semiconductor material.

Method of forming dummy copper plug to improve low k structure mechanical strength and plug fill uniformity

In accordance with the objectives of the invention a new method is provided for improving adhesion strength that is deposited over the surface of a layer of copper. Conventional etch stop layers of for instance dichlorosilane (SiClH) or SiOC have poor adhesion with an underlying layer of copper due to poor molecular binding between the interfacing layers. The surface of the deposited layer of copper can be provided with a special enhanced interface layer by using a method provided by the invention. That is pre-heat of the copper layer followed by a pre-cleaning treatment with ammonia (NH) and N, followed by forming an adhesive enhanced layer over the copper layer by treatment with Nor Oor Nwith alkyl-silane or alkyl silane.

Thin interface layer to improve copper etch stop

In accordance with the objectives of the invention a new method is provided for improving adhesion strength that is deposited over the surface of a layer of copper. Conventional etch stop layers of for instance dichlorosilane (SiCl H ) or SiOC have poor adhesion with an underlying layer of copper due to poor molecular binding between the interfacing layers. The surface of the deposited layer of copper can be provided with a special enhanced interface layer by using a method provided by the invention. That is pre-heat of the copper layer followed by a pre-cleaning treatment with ammonia (NH ) and N , followed by forming an adhesive enhanced layer over the copper layer by treatment with N or O or N with alkyl-silane or alkyl silane.

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Hsin-Chu, Taiwan

Bi-Trong Chen