Skyworks Solutions, Inc.

Bhuvaneshwaran Vijayakumar

Robert Francis Darveaux

Anthony James Lobianco

Hoang Mong Nguyen

Guohao Zhang

Dinhphuoc Vu Hoang

Hardik Bhupendra Modi

Lori Ann DeOrio

Jaydutt Jagdish Joshi

A packaging substrate can include a first surface and a second opposing surface, the first surface including a first mounting region of a first electronic module region and the second opposing surface including a first electrical contacts region of the first electronic module region. The packaging substrate can include a saw street region with at least a portion that surrounds the first electronic module region, and a saw street feature formed on the second opposing surface within at least a portion of the saw street region, the saw street feature being a solder mask layer over a metal layer.

Reduction of packaging substrate deformation

A packaging substrate can include a first surface and a second opposing surface, the first surface having a mounting region configured to receive electronic components, and electrical contacts formed on the second opposing surface. A saw street region can surround the mounting region and the electrical contacts, a metal layer and a solder mask layer being formed within the saw street region on the second opposing surface, and the solder mask layer being formed over the metal layer. An electronic module can include a packaging substrate including a first surface and a second opposing surface, the first surface including a mounting region. A plurality of electronic components can be mounted on the mounting region. A ground pad can be formed on the second opposing surface of the packaging substrate, the ground pad including a solder mask layer formed thereon, the solder mask layer having a plurality of openings.

Methods and devices related to reduced packaging substrate deformation

Disclosed are devices and methods for improving power added efficiency and linearity of radio-frequency power amplifiers implemented in flip-chip configurations. In some embodiments, a harmonic termination circuit can be provided so as to be separate from an output matching network configured to provide impedance matching at a fundamental frequency. The harmonic termination circuit can be configured to terminate at a phase corresponding to a harmonic frequency of the power amplifier output. Such a configuration of separate fundamental matching network and harmonic termination circuit allows each to be tuned separately to thereby improve performance parameters such as power added efficiency and linearity.

Flip-chip amplifier with termination circuit

Flip-chip linear power amplifier with high power added efficiency

Growing community of inventors

Irvine, CA, United States of America

Bhuvaneshwaran Vijayakumar