International Business Machines Corporation

Egypt Nanotechnology Center

Globalfoundries Inc.

Globalfoundries U.S. Inc.

Bhupesh Chandra

George Stojan Tulevski

Ali Afzali-Ardakani

Viorel C Ontalus

Paul S Chang

Glenn John Martyna

Timothy James McArdle

Ageeth Anke Bol

Ahmed Maarouf

Amal Kasry

Judson Robert Holt

Gregory Gower Freeman

Christopher D Sheraw

Mostafa M El-Ashry

Dechao Guo

Arvind Kumar

Shreesh Narasimha

Vincent James McGahay

Claude Ortolland

Matthew W Stoker

Sangameshwar Saudari

Fengnian Xia

An artificially oriented piezoelectric films for integrated filters and methods of manufacture. The method includes: forming a piezoelectric film with effective crystalline orientations of a polar axis rotated 90 degrees from a natural orientation for planar deposited piezoelectric films; and forming electrodes on a planar surface of the piezoelectric film. The piezoelectric film has an effective crystalline orientation of the polar axis in a horizontal orientation, with respect to the electrodes, and an effective crystalline orientation of the polar axis in a vertical direction adjacent to an underlying substrate.

Manufacturing method for an artificially oriented piezoelectric film for integrated filters

A nanotube-graphene hybrid film and method for forming a cleaned nanotube-graphene hybrid film. The nanotube-graphene hybrid film includes a substrate; nanotube film deposited over the substrate to produce a layer of nanotube film; and graphene deposited over the layer of nanotube film to produce a nanotube-graphene hybrid film.

Carbon nanotube-graphene hybrid transparent conductor and field effect transistor

The present disclosure relates to semiconductor structures and, more particularly, to artificially oriented piezoelectric films for integrated filters and methods of manufacture. The structure includes: a piezoelectric film with effective crystalline orientations of the polar axis rotated 90 degrees from a natural orientation for planar deposited films; and a conductor pattern formed on a surface of the piezoelectric film.

Artificially oriented piezoelectric film for integrated filters

A nanotube-graphene hybrid nano-component and method for forming a cleaned nanotube-graphene hybrid nano-component. The nanotube-graphene hybrid nano-component includes a gate; a gate dielectric formed on the gate; a channel comprising a carbon nanotube-graphene hybrid nano-component formed on the gate dielectric; a source formed over a first region of the carbon nanotube-graphene hybrid nano-component; and a drain formed over a second region of the carbon nanotube-graphene hybrid nano-component to form a field effect transistor.

Chip structures and fabrication methods for forming such chip structures. A first device structure has a structural feature comprised of a first dielectric material and a second device structure has a structural feature comprised of a second dielectric material. A semiconductor layer has a first section adjacent to the structural feature of the first device structure and a second section adjacent to the structural feature of the second device structure. The first section of the semiconductor layer has a popped relationship relative to the structural feature comprised of the first dielectric material. The second section of the semiconductor layer includes a portion that has a pinned relationship relative to a portion of the structural feature comprised of the second dielectric material.

Methods of modulating the morphology of epitaxial semiconductor material

A nanotube-graphene hybrid film and method for forming a cleaned nanotube-graphene hybrid film. A method includes depositing nanotube film over a metal foil to produce a layer of nanotube film, placing the metal foil with as-deposited nanotube film in a chemical vapor deposition furnace to grow graphene on the nanotube film to form a nanotube-graphene hybrid film, and transferring the nanotube-graphene hybrid film over a substrate.

Methods for forming a carbon nanotube-graphene hybrid film on a substrate

The disclosure relates to semiconductor structures and, more particularly, to one or more devices with an engineered layer for modulating voltage threshold (Vt) and methods of manufacture. The method includes finding correlation of thickness of a buffer layer to out-diffusion of dopant into extension regions during annealing of a doped layer formed on the buffer layer. The method further includes determining a predetermined thickness of the buffer layer to adjust device performance characteristics based on the correlation of thickness of the buffer layer to the out-diffusion. The method further includes forming the buffer layer adjacent to gate structures to the predetermined thickness.

Buffer layer for modulating Vt across devices

A process comprises combining a Ce (IV) salt dissolved in a solvent comprising water with a carbon material comprising CNT or graphene wherein the Ce (IV) salt is selected from a Ce (IV) ammonium salt of a nitrogen oxide acid, Ce (IV) ammonium salt of a sulfur oxide acid, Ce (IV) salt of a lower alkyl organo sulfur acid, or Ce (IV) salt of a lower alkane organo sulfur acid. In one embodiment the Ce (IV) salt is selected from Ce (IV) ammonium nitrate, Ce (IV) ammonium sulfate, Ce (IV) lower alkyllsulfonate, or Ce (IV) trifluoro lower alkanesulfonate. A product is produced by this process. An article of manufacture comprises this product on a substrate.

Cerium (IV) salts as effective dopant for carbon nanotubes and graphene

Transparent conducting electrodes include a doped single walled carbon nanotube film and methods for forming the doped single walled carbon nanotube (SWCNT) by solution processing. The method generally includes depositing single walled carbon nanotubes dispersed in a solvent and a surfactant onto a substrate to form a single walled carbon nanotube film thereon; removing all of the surfactant from the carbon nanotube film; and exposing the single walled carbon nanotube film to a single electron oxidant in a solution such that one electron is transferred from the single walled carbon nanotubes to each molecule of the single electron oxidant.

Doped carbon nanotubes and transparent conducting films containing the same

A faceted intrinsic buffer semiconductor material is deposited on sidewalls of a source trench and a drain trench by selective epitaxy. A facet adjoins each edge at which an outer sidewall of a gate spacer adjoins a sidewall of the source trench or the drain trench. A doped semiconductor material is subsequently deposited to fill the source trench and the drain trench. The doped semiconductor material can be deposited such that the facets of the intrinsic buffer semiconductor material are extended and inner sidewalls of the deposited doped semiconductor material merges in each of the source trench and the drain trench. The doped semiconductor material can subsequently grow upward. Faceted intrinsic buffer semiconductor material portions allow greater outdiffusion of dopants near faceted corners while suppressing diffusion of dopants in regions of uniform width, thereby suppressing short channel effects.

Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels

A nanotube-graphene hybrid film and method for forming a cleaned nanotube-graphene hybrid film. The method includes depositing nanotube film over a substrate to produce a layer of nanotube film, removing impurities from a surface of the layer of nanotube film not contacting the substrate to produce a cleaned layer of nanotube film, depositing a layer of graphene over the cleaned layer of nanotube film to produce a nanotube-graphene hybrid film, and removing impurities from a surface of the nanotube-graphene hybrid film to produce a cleaned nanotube-graphene hybrid film, wherein the hybrid film has improved electrical performance. Another method includes depositing nanotube film over a metal foil to produce a layer of nanotube film, placing the metal foil with as-deposited nanotube film in a chemical vapor deposition furnace to grow graphene on the nanotube film to form a nanotube-graphene hybrid film, and transferring the nanotube-graphene hybrid film over a substrate.

A composition and method for forming a field effect transistor with a stable n-doped nano-component. The method includes forming a gate dielectric on a gate, forming a channel comprising a nano-component on the gate dielectric, forming a source over a first region of the nano-component, forming a drain over a second region of the nano-component to form a field effect transistor, and exposing a portion of a nano-component of a field effect transistor to dihydrotetraazapentacene, wherein dihydrotetraazapentacene is represented by the formula: wherein each of R1, R2, R3, and R4 comprises one of hydrogen, an alkyl group of C1 to C16 carbons, an alkoxy group, an alkylthio group, a trialkylsilane group, a hydroxymethyl group, a carboxylic acid group and a carboxylic ester group.

Growing community of inventors

Jersey City, NJ, United States of America

Bhupesh Chandra