Electronics and Telecommunications Research Institute

Korea Advanced Institute of Science and Technology

Bheom-Soon Joo

Hae-Won Jung

Dae-Ub Kim

Tae-Sik Cheung

Marc Holness

Yang Yang

June-Koo Rhee

Jeong-dong Ryoo

Jin-Sung Im

Zahir Uddin Ahmad

Jong-Hyun Lee

Ji-Wook Youn

Myung-Hee Son

Jung-Sik Kim

Jeong-Dong Ryoo

Bup-Joong Kim

Young-sun Kim

A processor time synchronization apparatus and method in a data communication system which includes a plurality of processors and line interfaces. The processor time synchronization apparatus includes a first local processor configured to recognize a time difference between an external device and the system based on a time message exchanged with the external device, and synchronize time between the external device and the system, and a second local processor configured to receive time information from the first local processor that has been time-synchronized with the external device, the time information containing the time difference between the external device and the system, and synchronize the first local processor with a system's internal time using the received time information.

Processor time synchronization apparatus and method in data communication system with multiple processors and line interfaces

Provided is a failure recovery method in a non-revertive mode of an Ethernet ring network. In an Ethernet ring network, link priorities between nodes or node priorities are determined based on media access control (MAC) addresses and the nodes having blocked ports are determined after failures are recovered from based on the priorities so that the blocked ports can be distributed.

Failure recovery method in non revertive mode of Ethernet ring network

Failure recovery method in non revertive mode of ethernet ring network

Provided are a method and apparatus for transmitting error information between an Ethernet network and a synchronous digital hierarchy (SDH) network. According to the present invention, when an error occurs in the Ethernet network or the SDH network, OAM information is transferred to the opposite network by using a conventional MAC control frame from a linked part of the Ethernet network and the SDH network and thus the EoS network may be efficiently operated and managed. Also, by using standardized MAC control frame, the present invention may be applied to an existing system without additionally changing hardware or defining a new OAM frame.

Method and apparatus for transmitting error information between ethernet network and synchronous digital hierarchy network

An Ethernet protection switching method based on a change in link status in a link aggregation sublayer is disclosed. If an Ethernet link aggregation sublayer is present on an Ethernet connection path, a link aggregation sublayer Management Entity Group (MEG) end point is assigned to the Ethernet link aggregation sublayer to generate a link aggregation message for Ethernet connection management and protection switching. When a change in link status is detected in the Ethernet link aggregation sublayer, the link-aggregation-sublayer MEG end point generates and sends the link aggregation message to an MEG end point performing Ethernet connection management and protection switching. Adequate Ethernet protection switching may be performed even in the presence of the link aggregation sublayer.

Protection switching method based on change in link status in ethernet link aggregation sublayer

Provided are a data receiving apparatus that can determine data by adjusting a reference level for determining a logic value of inputted data based on Inter-Symbol Interference in a data signal inputted through a transmission line, and receive the data without errors by compensating for timing margin decrease caused by the inter-symbol interference, and a method thereof. The apparatus includes: a reference generator for monitoring the level of an inputted data signal or generating reference levels according to an external control command; a comparator for comparing the inputted data with the reference levels and determining logic values of the inputted data; a selector for selecting the logic values of the inputted data as a valid logic value; and a selection controller for monitoring the valid logic value of the selector, transmitting a selection control signal to the selector, and controlling a process for selecting the valid logic value.

Data receiving apparatus capable of compensating for reduced timing margin caused by inter-symbol interference and method thereof

Provided is an Ethernet port apparatus supporting multiple physical media, a physical medium managing method, and a switching system using the same. The Ethernet port apparatus of the present research can use and manage multiple transmission media by freely selecting and exchanging the transmission media in a system using an Ethernet port. The Ethernet port apparatus supporting multiple physical media, which includes: a main board unit for supporting hot swap and power supply; a detachable physical medium-based sub-board unit for generating a control signal, transmitting the control signal to the main board means, performing a transceiving function suitable for the desired physical medium; and a physical medium support fixing unit for transmitting variable power, a power control signal, a physical medium control signal, a physical medium state information, and physical medium-dependent bitstream between the main board unit and the sub-board unit.

Ethernet port apparatus supporting multiple physical media, media managing method therefor, and switching system using the same

Provided is a topology discovery method for an Ethernet network that can effectively discover a physical topology with respect to the Ethernet network of a mesh structure without developing and using a separate control protocol. The topology discovery method in an Ethernet network includes the steps of: acquiring an interface management information base (MIB) and a bridge MIB; defining and storing information for discovering a physical topology; discovering an edge bridge that divides a boundary between a bridge network and a host network; discovering the physical topology with respect to the bridge network by using the schema; discovering the connection relationship with the host network by using an address learning address forwarding table (AFT) with respect to the edge bridge included in the bridge network; and outputting the connection relationship of the bridge network and the host network as a graph.

Growing community of inventors

Daejeon, South Korea

Bheom-Soon Joo