Indian Institute of Science

Department of Electronics and Information Technology

Indian Institute of Science Bangalore

Bharadwaj Amrutur

Navakanta Bhat

Pratap Kumar Das

Kannan Aryaperumal Sankaragomathi

Sampath Srinivasan

Madhusudan Srinivasan

Siva Rama Krishna Vanjari

Bishnu Prasad Das

Laxmi Karthikeyan

Chakrapani Kalapu

K Bhavani Pradeep

Guruaj V Naik

Satyam Dwivedi

Amit Kumar Mandal

A device and method for area sensing and actuation comprises highly scalable sensing and actuation network that can control a high density of sensing and actuation elements over a physical area. The device comprises a matrix of CMOS sensing chips that each comprise a plurality of sensing electrodes arranged in a matrix of columns and rows along horizontal wires and vertical wires. The vertical wires carry an activation signal to activate a column of sensing electrodes, and the vertical wires carry sensing and actuation signals between the column of sensing electrodes and a processing chip. The signals may be amplified by CMOS sensing chips between the source and destination of the signals. In this way, signals may be received from and sent to a dense matrix of sensing electrodes spanning a large geographic area with little or no degradation.

Surfaces with embedded sensing and actuation networks using complementary-metal-oxide-semiconductor (CMOS) sensing chips

Embodiments of the disclosure relate to a low drop diode equivalent circuit. Piezoelectric device based vibration energy harvesting requires a rectifier for conversion of input ac to usable dc form. Power loss due to diode drop in rectifier is a significant fraction of the already low levels of harvested power. The low-drop-diode equivalent can replace the rectifier diodes and minimize power loss. The diode equivalent mimics a diode using linear region operated MOSFET. The diode equivalent is powered directly from input signal and requires no additional power supply for its control. Power used by the control circuit is kept at a value which gives an overall output power improvement. The diode equivalent replaces the four diodes in a full wave bridge rectifier, which is the basic full-wave rectifier and is a part of the more advanced rectifiers like switch-only and bias-flip rectifiers.

Low drop diode equivalent circuit

An adaptive digital baseband receiver is described in which operating parameters of the receiver, such as bit-widths and operating frequencies, are determined that achieve a target bit-error-ratio (BER) as a function of received signal-to-noise ratio (SNR) and interference levels in a wireless channel and enable the receiver to consume a minimum amount of power. Over consumption of power may be avoided due to a functional relationship between optimal resolution and input signal conditions. In exemplary embodiments, the adaptive digital receiver is provided that adjusts bit-widths and operating frequency at power efficient levels while meeting a target BER. Simulations can be used to determine a relation between bit-width, operating frequency, and input signal conditions, for example.

Adaptive digital baseband receiver

Design of a disposable screen printed electrode (SPE) for sensing percentage glycated hemoglobin using electrochemistry is disclosed. SPE has four electrodes, one working electrode for the detection of glycated hemoglobin, one working electrode for the detection of hemoglobin and the other two electrodes are counter and reference electrodes that are common for both detection schemes. It also has a cellulose acetate membrane with lysis agents and surfactant embedded in it. Lysis agents lyse erythrocytes and release hemoglobin. Surfactants modify hemoglobin structure and enhance the rate the electron transfer and thereby the output signal during the electrochemical analysis. The SPE is low cost and user friendly. The only input from the user is a drop of blood.

Low cost electrochemical disposable sensor for measuring glycated hemoglobin

Embodiments of the disclosure relate to an all-digital technique for generating an accurate delay irrespective of the inaccuracies of a controllable delay line. A sub-sampling technique based delay measurement unit capable of measuring delays accurately for the full period range is used as the feedback element to build accurate fractional period delays based on input digital control bits. The delay generation system periodically measures and corrects the error and maintains it at the minimum value without requiring any special calibration phase. A significant improvement in accuracy is obtained for a commercial programmable delay generator chip. The time-precision trade-off feature of the delay measurement unit is utilized to reduce the locking time. Loop dynamics are adjusted to stabilize the delay after the minimum error is achieved, thus avoiding additional jitter.

System to generate a predetermined fractional period time delay

A low noise amplifier (LNA) system with controllable linearity and noise figure versus power consumption is provided. The system comprises two control inputs for tuning. One input controls an effective transistor width, and the other input controls bias current. Changes to the effective transistor width alter a gain that is applied to a signal, and changes to the bias current alter a power consumption of the system. For more stringent signal specifications, an impedance matched inductive degeneration variation of the LNA is provided.

Low noise amplifier and mixer

A technique for a delay measurement system to measure the skews in a clock distribution network is presented. It uses the principle of sub-sampling to measure and amplify small clock skews and determine an estimate of clock skew by further manipulation if these sampled measurements. The technique can be applied to measure clock skew on a computer chip, between bit-line of a communication bus, or between elements connected by an electronic or optical interconnect.

Methods and systems for measuring and reducing clock skew using a clock distribution network

A system and method to measure a delay of an individual logic gate in an unmodified form on a chip using a digitally reconfigurable ring oscillator (RO) that is on the chip is provided. A system of linear equations is established for different configuration settings of the ring oscillator and solved to determine a delay of an individual gate.

Gate delay measurement circuit and method of determining a delay of a logic gate

System and methods for reducing third harmonic distortion produced by nonlinear amplifiers are disclosed. A system may include an amplifier circuit with an amplifier transistor such that the amplifier is capable of exhibiting an amplifier output signal containing third harmonic distortion. Further, a system may include a nonlinear feedback circuit with a first feedback transistor operating in Triode mode that produces a feedback electronic signal containing a feedback third harmonic component. In addition, the nonlinear feedback circuit may be configured to the amplifier circuit in negative feedback such that the feedback third harmonic component of the feedback electronic signal reduces the third harmonic distortion of the amplifier output signal. A system may also provide an output signal that has less third harmonic distortion than the amplifier output signal.

System for reducing distortion in an electronic circuit using nonlinear feedback

An example method for optimizing power consumption of digital circuits using dynamic voltage and threshold scaling (DVTS) is provided. A propagation delay of a signal through a portion of the circuit is determined and if the propagation delay does not meet a specified delay requirement, then a supply voltage and/or threshold voltage of the circuit is adjusted. Subsequently, a power consumption level of the circuit is determined and compared to previous power consumption levels. The supply and/or threshold voltage of the circuit can be readjusted to enable the circuit to meet specified power consumption requirements and the specified delay requirement, for example.

Growing community of inventors

Bengaluru, India

Bharadwaj Amrutur