Apple Inc.

Fungible, Inc.

Upthere, Inc.

Microsoft Technology Licensing, LLC

Next Software, Inc.

Western Digital Technologies, Inc.

Next Computer, Inc.

Bertrand Serlet

Wael Noureddine

Pradeep S Sindhu

Jean-Marc Frailong

Blaine Garst

Deepak Goel

Felix A Marti

Rajan Goyal

Ali T Ozer

Rudolph Van Der Merwe

Richard E Crandall

Trey Matteson

Avadis Tevanian, Jr

Clark H Warner

Thomas Goossens

Kazuhisa Yanagihara

Paul Kim

Gregory Bjorn Vaughan

Yefim Grosman

Alex Tremain Nelson

Jeffrey H Michaud

Douglas Richardson

Darin Benjamin Adler

Maciej Stachowiak

Samuel Noble

Roger Bodamer

Christina Elizabeth Warren

Christopher A Wolf

Aibing Zhou

David Vernon Payne

Stanislav Kounitski

Scott James Forstall

Jerome Rene Bellegarda

Kevin Tiene

Ian C Hendry

Jaspal Kohli

Kim E A Silverman

Douglas P Mitchell

Cedric Bray

Charles Edward Gray

Cédric Bray

Gerald Blaine Garst, Jr

Pratapa Reddy Vaka

Avadis Tevanian

Xiaoqin Ma

Louis Monier

Emanuele Altieri

Daniel James Nigel Picken

Lee Boynton

A three-dimensional ('3D') avatar can be automatically created that resembles the physical appearance of an individual captured in one or more input images or video frames. The avatar can be further customized by the individual in an editing environment and used in various applications, including but not limited to gaming, social networking and video conferencing.

Automatic avatar creation

A new processing architecture is described that utilizes a data processing unit (DPU). Unlike conventional compute models that are centered around a central processing unit (CPU), the DPU that is designed for a data-centric computing model in which the data processing tasks are centered around the DPU. The DPU may be viewed as a highly programmable, high-performance I/O and data-processing hub designed to aggregate and process network and storage I/O to and from other devices. The DPU comprises a network interface to connect to a network, one or more host interfaces to connect to one or more application processors or storage devices, and a multi-core processor with two or more processing cores executing a run-to-completion data plane operating system and one or more processing cores executing a multi-tasking control plane operating system. The data plane operating system is configured to support software functions for performing the data processing tasks.

Data processing unit for stream processing

A new processing architecture is described in which a data processing unit (DPU) is utilized within a device. Unlike conventional compute models that are centered around a central processing unit (CPU), example implementations described herein leverage a DPU that is specially designed and optimized for a data-centric computing model in which the data processing tasks are centered around, and the primary responsibility of, the DPU. For example, various data processing tasks, such as networking, security, and storage, as well as related work acceleration, distribution and scheduling, and other such tasks are the domain of the DPU. The DPU may be viewed as a highly programmable, high-performance input/output (I/O) and data-processing hub designed to aggregate and process network and storage I/O to and from multiple other components and/or devices. This frees resources of the CPU, if present, for computing-intensive tasks.

Data processing unit for compute nodes and storage nodes

Methods and apparatus for memory management are described. In one example, this disclosure describes a method that includes executing, by a first processing unit, first work unit operations specified by a first work unit message, wherein execution of the first work unit operations includes accessing data from shared memory included within the computing system, modifying the data, and storing the modified data in a first cache associated with the first processing unit; identifying, by the computing system, a second work unit message that specifies second work unit operations that access the shared memory; updating, by the computing system, the shared memory by storing the modified data in the shared memory; receiving, by the computing system, an indication that updating the shared memory with the modified data is complete; and enabling the second processing unit to execute the second work unit operations.

Memory management in a multiple processor system

An access node that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from network devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to receive data to be processed, wherein the access node includes a plurality of processing cores, a data network fabric, and a control network fabric; receive, over the control network fabric, a work unit message indicating a processing task to be performed a processing core; and process the work unit message, wherein processing the work unit message includes retrieving data associated with the work unit message over the data network fabric.

Access node for data centers

Relay consistent memory management in a multiple processor system

A key-value store supporting GET, PUT and DELETE operations, serializes multiple clients using two locks, and that supports asynchronous resizing. The locking scheme includes an operation of holding two locks, one for the key involved in the operation, one for the page currently searched or updated. The store can either be a single volume holding keys and data or can be organized as a directory volume referencing a number of data volumes organized by data-size ranges. The scheme also supports asynchronous resizing of the directory while continuing to perform operations.

Data processing unit with key value store

A method and apparatus are provided for navigating through a media object collection using a mobile device. Users navigate to the target media objects by repeatedly specifying filters. After a user specifies a filter, the filter is applied in combination with all previously specified filters to produce a filtered set of media objects. After a filter is applied, a display level is selected for each hierarchical dimension for which the media objects have metadata. The selection of the display level may be based on the number of distinct values that the media objects in the filtered set have for each level of the hierarchical dimension. Single-action controls are then displayed for each of the values that the media objects in the filtered set have for the selected display level.

Content-aware filter options for media object collections

Techniques are described in which a device, such as a network device, compute node or storage device, is configured to utilize a work unit (WU) stack data structure in a multiple core processor system to help manage an event driven, run-to-completion programming model of an operating system executed by the multiple core processor system. The techniques may be particularly useful when processing streams of data at high rates. The WU stack may be viewed as a stack of continuation work units used to supplement a typical program stack as an efficient means of moving the program stack between cores. The work unit data structure itself is a building block in the WU stack to compose a processing pipeline and services execution. The WU stack structure carries state, memory, and other information in auxiliary variables.

Work unit stack data structures in multiple core processor system for stream data processing

A highly-programmable access node is described that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from storage devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to execute a large number of data I/O processing tasks relative to a number of instructions that are processed. The access node may be highly programmable such that the access node may expose hardware primitives for selecting and programmatically configuring data processing operations. As one example, the access node may be used to provide high-speed connectivity and I/O operations between and on behalf of computing devices and storage components of a network, such as for providing interconnectivity between those devices and a switch fabric of a data center.

Access node integrated circuit for data centers which includes a networking unit, a plurality of host units, processing clusters, a data network fabric, and a control network fabric

Methods and apparatus for memory management are described. In a disclosed embodiment, a system has a first and a second processor, with each processor able to access a memory system. A first work unit is received for execution by the first processor, with the memory system being accessed. A second work unit is generated for execution by a second processor upon execution of a first work unit. Only after the memory system is updated does processing of the second work unit by the second processor occur. This work unit message based ordering provides relay consistency for memory operations of multiple processors.

Growing community of inventors

Palo Alto, CA, United States of America

Bertrand Serlet