Texas Instruments Corporation

Arizona State University

Stimwave Technologies Incorporated

California Institute of Technology

Curonix LLC

Other

Arizona Board of Regents, a Body Corporate

Micron Devices LLC

Bertan Bakkaloglu

Laura Tyler Perryman

Chad David Andresen

Brian Lum-Shue-Chan

Abdellatif Bellaouar

Sayfe Kiaei

Umar Jameer Lyles

Paul H Fontaine

Philippe C Adell

Ranu Jung

John Houldsworth

Gary Lee Stirk

Weibiao Zhang

Siew Kuok Hoon

Stephen R Phillips

James Abbas

Wallace Edward Matthews

Kenneth Horch

Parisa Mahmoudidaryan

James T Aberle

Tao Liu

Brian Allen

Ming Sun

Bert Vermeire

Seung-Jae Kim

Bhaskar Aravind

Hang Song

Shahin Taleie

An integrated circuit includes: a radio-frequency (RF) to direct current (DC) rectifying circuit coupled to one or more antenna on an implantable wirelessly powered device, the rectifying circuit configured to: rectify an input RF signal received at the one or more antennas and from an external controller through electric radiative coupling; and extract DC electric power and configuration data from the input RF signal; a logic control circuit connected to the rectifying circuit and a driving circuit, the logic control circuit configured to: generate a current for the driving circuit solely using the extracted DC electrical power; in accordance with the extracted configuration data, set polarity state information for each electrode; and a driving circuit coupled to one or more electrode, the driving circuit comprising current mirrors and being configured to: steer, to each electrode and via the current mirrors, a stimulating current solely from the generated current.

Circuit for an implantable device

A wirelessly powered implantable stimulator device includes one or more antenna configured to receive an input signal non-inductively from an external antenna, the input signal containing (i) electrical energy to operate the implantable stimulator device and (ii) configuration data according to which a pulse-density modulation (PDM) encoded stimulus waveform signal is retrieved to synthesize a desired stimulation waveform; a circuit coupled to the one or more antenna; and one or more electrodes coupled to the circuit and configured to apply the desired stimulation waveform to neural tissue, wherein the circuit is configured to: rectify the input signal received at the one or more antennas non-inductively; extract the electrical energy and the configuration data from the input signal; and in accordance with the extracted configuration data, retrieve the pulse-density modulation (PDM) signal to synthesize the desired stimulation waveform therefrom.

Pulse-density modulation to synthesize stimulation waveforms on an implantable device

A method including producing an electronic circuit. The method can include providing a first circuit portion, a second circuit portion, a flying capacitor voltage comparator, an output switching circuit, an electronic circuit first output node, and/or an electronic circuit second output node. The electronic circuit first output node can be electrically coupled to a first gate terminal of a switching converter. The electronic circuit second output node can be electrically coupled to a second gate terminal of the switching converter. The method also can include electrically coupling a voltage sensor output terminal of the flying capacitor voltage comparator to the first circuit second input node of the first circuit portion and the second circuit second input node of the second circuit portion. Other embodiments are disclosed.

Electronic circuit and method of controlling three-level switching converters

An autozeroed comparator controls a frequency fof the input voltage inputted to a DC/DC converter. A digital frequency synchronization circuit is connected to the autozeroed comparator so as to form a phase locked loop, wherein the DES circuit controls the hysteretic window of the autozeroed comparator so as to lock fto a clock reference frequency. A plurality of slave phase circuits may be connected to the master phase circuit including the DFS circuit and the autozeroed comparator. Duty cycle calibration circuits adjust a duty cycle signal applied to each of the slave phase circuits, in response to average current measured in the slave phase circuits, so that each slave phase circuit is synchronized with the master phase circuit. A 6 A 90.5% peak efficiency 4-phase hysteretic quasi-current-mode buck converter is provided with constant frequency and maximum &#xb1;1.5% current mismatch between the slave phases and the master phase.

Digital multiphase hysteretic point-of-load DC/DC converter

Techniques, apparatuses, and systems for interfacing multiple sensors with a biological system can include amplifying signals from respective sensors associated with an external device; modulating the amplified signals based on respective different frequency values; and summing the modulated signals to produce an output signal to stimulate a biological system.

Communication interface for sensory stimulation

A DC-DC converter for generating a DC output voltage includes: a digitally controlled pulse width modulator (DPWM) for controlling a switching power stage to supply a varying voltage to an inductor; and a digital voltage feedback circuit for controlling the DPWM in accordance with a feedback voltage corresponding to the DC output voltage, the digital voltage feedback circuit including: a first voltage controlled oscillator for converting the feedback voltage into a first frequency signal and to supply the first frequency signal to a first frequency discriminator; a second voltage controlled oscillator for converting a reference voltage into a second frequency signal and to supply the second frequency signal to a second frequency discriminator; a digital comparator for comparing digital outputs of the first and second frequency discriminators and for outputting a digital feedback signal; and a controller for controlling the DPWM in accordance with the digital feedback signal.

Low-to-medium power single chip digital controlled DC-DC regulator for point-of-load applications

Low noise, low dropout regulators are described. An example low noise, low dropout regulator includes a chopping error amplifier to receive an input signal and a feedback signal and to output a modified signal having an undesired portion of the input signal shifted to a higher frequency and a regulator to receive the modified signal and to generate an output signal by filtering the undesired portion of the input signal from the modified signal.

Low noise, low dropout regulators

Systems and methods are provided for monitoring a voltage. A level shifter is configured to generate a current proportional to the voltage of the battery cell. A delta-sigma modulator is configured to convert the current into a first density modulated bitstream representing the voltage of the battery cell. A first reference source is configured to provide a second density modulated bitstream representing a first threshold voltage. A first comparator is configured to compare the first density modulated bitstream and the second density modulated bitstream.

Voltage monitoring using bitstream signal processing

Systems and methods for analog to digital conversion charge storage device measurement are presented. In multi-cell charge storage device monitoring systems, accurate measurement of cell voltages is used for protection of the multi-cell device. The disclosed cell referenced solution converts the cell voltage to a digital representation referenced at the cell voltage. The digital representation referenced to the cell voltage is then level shifted to a ground referenced signal suitable for digital post processing. This processing may be used for fault detection of over-voltage, under-voltage, open cell, and similar fault conditions and cell capacity measurements. An example embodiment implements a sigma delta modulator to perform the signal transformation from analog to digital. The disclosed systems and methods may be differential and stackable for multiple cells.

Systems and methods for analog to digital converter charge storage device measurement

A closed-loop controlled antenna tuning unit (ATU) system includes a return loss detector connected to sample an RF signal generated by a signal source to provide a return loss signal. A matching state searching circuit is connected to receive the return loss signal and, in response, selectively store a return loss value and an impedance matching state. A central controller is connected to provide a switch control signal and apply an optimum matching state to the impedance synthesizer at the conclusion of the matching state search. An impedance synthesizer is responsive to the switch control signal for coupling a radio frequency signal and matching the impedance of an antenna to a signal source.

Automatic antenna tuning unit for software-defined and cognitive radio

Growing community of inventors

Scottsdale, AZ, United States of America

Bertan Bakkaloglu