Infineon Technologies Ag

Bernhard Greslehner-Nimmervoll

Rainer Findenig

Jochen Oliver Schrattenecker

Christian Schmid

Georg Krebelder

Alexander Melzer

Grigory Itkin

Bernhard Gstoettenbauer

Thomas Bauernfeind

Alexander Onic

Andreas Schwarz

Markus Josef Lang

Francesco Lombardo

Clemens Pfeffer

Lukas Heschl

Ulrich Moeller

Nicolo Guarducci

Martin Wiessflecker

Daniel Maier

Thorsten Brandt

Evangelos Koutsouradis

A radar semiconductor chip includes a radar circuit component configured to generate at least part of a frequency-modulated ramp signal or process at least part of a reflected frequency-modulated ramp signal according to a control parameter; a memory configured to store a sequencing program associated with regulating the control parameter, wherein the sequencing program specifies a first data source, external to the sequencing program, that is configured to provide a first data value corresponding to the control parameter; and a decoder configured to read the sequencing program, access the first data value from the first data source specified by the sequencing program, derive a first control value for the control parameter from the first data value, and provide the first control value to the radar circuit component. The radar circuit component regulates a controlled circuit function in accordance with the control parameter based on the first control value.

Efficient programming model for real-time radar sequencing in a radar device

A frequency linearity measurement circuit configured to measure a frequency linearity of a frequency signal includes: a first measurement circuit having a counter, where the counter is controlled by a gate signal having a gate signal period, where the first measurement circuit is configured to generate a first estimate of an integer number of clock cycles of the frequency signal within a respective gate signal period of the gate signal; a second measurement circuit having a time-to-digital converter (TDC), where the TDC is controlled by the gate signal, and is configured to generate a second estimate of a fractional number of clock cycle of the frequency signal within the respective gate signal period of the gate signal; and a reference measurement circuit configured to generate a third estimate of an expected number of clock cycles within the respective gate signal period of the gate signal.

Real-time chirp signal frequency linearity measurement

A radar device may include a memory to store a program associated with operating the radar device. The radar device may include a decoder to read the program from the memory, and generate a control value and a timestamp based at least in part on the program. The control value may be a value to be provided as an input to a component of the radar device at a time indicated by the timestamp. The radar device may include a first-in first-out (FIFO) buffer to store at least the control value and provide the control value as the input to the component of the radar device at the time indicated by the timestamp.

Modular sequencer for radar applications

An apparatus is described that, according to an exemplary embodiment, has an RF oscillator for generating an RF oscillator signal at a first frequency and a frequency divider having a division ratio that is fixed during operation. The frequency divider is supplied with the RF oscillator signal and is configured to provide an oscillator signal at a second frequency. The apparatus further has a monitor circuit, to which the oscillator signal at the second frequency is supplied and which is configured to measure the second frequency and to provide at least one digital value that is dependent on the second frequency of the oscillator signal. The at least one digital value is provided on a test contact.

Radar front end with RF oscillator monitoring

The description below relates to a method for a radar sensor. According to one example implementation, the method comprises receiving configuration data and storing the received configuration data in a first radar chip having multiple transmission channels. The configuration data contain multiple parameter sets for a chirp sequence and association information representing an association of a respective chirp of the chirp sequence with one of the multiple parameter sets. The method further comprises receiving a trigger signal in the first radar chip. The trigger signal indicates the beginning of a respective chirp of the chirp sequence. The transmission channels mentioned are repeatedly configured in sync with the trigger signal, wherein for each chirp of the chirp sequence the transmission channels are configured according to the respective association information. The method further comprises receiving an RF oscillator signal representing the chirp sequence, and supplying the RF oscillator signal to the accordingly configured transmission channels.

Radar sensor having multiple radar chips

A semiconductor chip comprising at least one transmit channel and/or at least one receive channel for radar signals and also a sequencing circuit is proposed. In this case, the sequencing circuit is configured centrally to determine a sequencing scheme for time-dependent functions of the transmit channel and/or of the receive channel and to drive circuit elements of the transmit channel and/or of the receive channel in accordance with the sequencing scheme.

Semiconductor chip and device and method for driving at least one channel for a radar signal

One example of a radar device includes a phase-locked loop for generating a radiofrequency signal. The phase-locked loop has a multi-modulus divider. The radar device furthermore comprises a delta-sigma modulator for generating a modulated signal for the multi-modulus divider, and a signal generator for generating an input signal for the delta-sigma modulator. The radar device has monitoring circuits, wherein a first monitoring circuit is configured to monitor a locked state of the phase-locked loop, a second monitoring circuit is configured to monitor the delta-sigma modulator, and a third monitoring circuit is configured to monitor the signal generator.

Radar device, monitoring device, phase control circuit and method for monitoring a signal processing circuit

A device for monitoring a digital control unit with regard to functional safety is proposed. The device comprises an interface configured to receive a control signal of the digital control unit for a circuit component. The control signal represents a digital value. Furthermore, the device comprises a timer circuit configured to output an associated timer value in each case for successive points in time. The device furthermore comprises a hash value generator, which is configurable, in response to a change in the digital value, to recalculate a hash value on the basis of the change in the digital value and the timer value at the point in time of the change in the digital value.

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Hagenberg i.M., Austria

Bernhard Greslehner-Nimmervoll