Ihp Gmbh - Innovations for High Performance Microelectronics

Ihp Gmbh-innovations for High Performance Microelectronics/institut Fur Innovative Mikroelektronik

Technische Unversität Berlin

Institut Fuer Halbleiterphysik Frankfurt (oder) Gmbh

Ihp Gmbh - Innovations for High Performance

Ihp Gmbh—innovations for High Performance Microelectronics/liebniz-institut Fur Innovative Mikroelektronik

Institut Fuer Halbleiterphysik Franfurt (oder) Gmbh

Ihp Gmbh-innovations for High Performance Microelectronics/leibniz-institut Fur Innovative Mikroelektronik

Bernd Tillack

Bernd Heinemann

Karl-Ernst Ehwald

Dieter Knoll

Dirk Wolansky

Thomas Grabolla

Stefan Meister

Aws Al-Saadi

Lars Zimmermann

Mehmet Kaynak

Hans Joachim Eichler

Yuji Yamamoto

Mario Birkholz

Bulent Franke

René Scholz

George Ritter

Peter Schley

Georg Ritter

Juergen Drews

Bülent Franke

Eberhard Bugiel

An electro-optic modulator for the modulation of optical radiation of a predetermined wavelength, the electro-optic modulator having at least one optical resonator in which a standing optical wave can be formed for the predetermined wavelength. In the resonator, at least two doped semiconductor sections&#x2014;as seen in the longitudinal direction of the resonator &#x2014;are arranged at a distance from one another, and the at least two doped semiconductor sections respectively lie locally at an intensity minimum of the standing optical wave.

Electro-optic modulator

The invention relates to a microelectromechanical system with an electromechanical microswitch for switching an electrical signal in particular a radio frequency signal, in particular in a GHz range, comprising a multi-level conductive path layer stack arranged on a substrate, wherein conductive paths of the multi-level conductive path layer stack arranged in different conductive levels are insulated from one another through electrically insulating layers and electrically connected with one another through via contacts, an electromechanical switch which is integrated in a recess of the multi-level conductive path layer stack and which includes a contact pivot, an opposite contact and at least one drive electrode for the contact pivot, wherein the contact pivot, the opposite contact and the at least one drive electrode respectively form a portion of a conductive level of the multi-level layer stack.

Electromechanical microswitch for switching an electrical signal, microelectromechanical system, integrated circuit, and method for producing an integrated circuit

A reactor arrangement for layer deposition on a plurality of substrates (hereafter substrates) comprising a first reactor chamber for simultaneous cleaning the substrates, at least one second reactor chamber for depositing at least one layer on each of the substrates, a first heating device for setting the substrate temperature of the substrates in the first reactor chamber, a second heating device for setting the substrate temperature of the substrates in the second reactor chamber, a device for producing a gas atmosphere of predetermined composition and predetermined pressure, a transport device for transporting the substrates simultaneously from the first to the second reactor chamber, and a control device for controlling the heating devices and device for producing the gas atmosphere in such a way that the substrates are moved or stored in an interruption-free manner in a reducing gas atmosphere as long as the substrate temperature is above critical temperature T.

Apparatus for low-temperature epitaxy on a plurality semiconductor substrates

A method of depositing polycrystalline silicon exclusively on monocrystalline first silicon surface portions of a substrate surface which besides the first surface portions additionally has insulator surface portions, comprising the steps of depositing boron on the first silicon surface portions in an amount which in relation to the first silicon surface portions respectively corresponds to more than a monolayer of boron, and depositing silicon on the first silicon surface portions treated in that way.

Selective growth of polycrystalline silicon-containing semiconductor material on a silicon-containing semiconductor surface

The invention relates to layers in substrate wafers. The aim of the invention is to provide layers in substrate wafers with which the drawbacks of conventional assemblies are overcome in order to achieve, on the one hand, an adequate resistance to latch-up in highly scaled, digital CMOS circuits with comparatively low costs and, on the other hand, to ensure low substrate losses/couplings for analog high-frequency circuits and, in addition, to influence the component behavior in a non-destructive manner. To these ends, the invention provides that in a highly resistive p-Si substrate () with one or more buried high-carbon Si layers () under an epitaxial layer and with the Si cap layer (), an implantation dose, which is greater in comparison to conventional substrate wafers, is used for retrograde trough profiles by suppressing the dopant diffusion as well as the generation of defects when remedying implant defects, thereby achieving a reduction of the trough resistance, and finally, an increase in the resistance to latch-up.

Layers in substrate wafers

System for producing diffusion-inhibiting epitaxial semiconductor layers, by means of which thin diffusion-inhibiting, epitaxial semiconductor layers can be produced on large semiconductor substrates at a high throughput. The surfaces of the semiconductor substrates to be coated are first cleaned, and the substrates are then heated in a low pressure batch reactor to a first temperature (prebake temperature). The surfaces to be coated are next subjected to a hydrogen prebake operation at a first reactor pressure. In the next step the semiconductor substrates are heated in a low pressure hot or warm wall batch reactor to a second temperature (deposition temperature) lower than the first temperature, and after a condition of thermodynamic equilibrium is reached the diffusion-inhibiting semiconductor layers are deposited on the surfaces to be coated in a chemical gaseous deposition process (CVD) at a second reactor pressure higher than, equal to or lower than the first reactor pressure.

Method and device for the production of thin epitaxial semiconductor layers

The invention relates to a bipolar transistor and a method for producing same. The aim of the invention is to provide a bipolar transistor and a method for producing same, which during the use of a single-process poly-silicon technology with differential epitaxis for the production of bases overcomes the disadvantages of conventional systems, so as notably further to improve the high-speed properties of a bipolar transistor, provide the most conductive connections possible between the metal contacts and the active (internal) transistor region as well as a minimized passive transistor surface, while at the same time avoiding greater process complexity and increased contact resistances. To this end a surface relief is produced in the active emitter region by a wet-chemical process. A single-process poly-silicon bipolar transistor having a base produced by epitaxis in accordance with the invention permits a reduction in external base resistance without causing a deterioration in emitter properties. Because the internal and external base regions are deposited continuously no interface problems arise during connection of the base. Base-collector capacity can also be lowered.

Bipolar transistor and method for producing same

This invention relates to a bi-polar transistor and a procedure for its manufacture. The task of the invention is to propose a bi-polar transistor and a procedure for its manufacture that eliminates the disadvantages of conventional arrangements for a simple polysilicon technology with differential epitaxy for the manufacture of the base, in order to further improve especially the high-speed properties of a bi-polar transistor, to produce highly conductive connections between the metal contacts and the active (inner) transistor region as well as a minimized passive transistor surface, and to simultaneously avoid any additional process complexity and increased contact resistance. This invention resolves the task in that, by creating suitable epitaxy process conditions, the polysilicon layer is deposited on the insulator zone with a greater thickness than the epitaxy layer in the active transistor zone. The greater thickness of the polysilicon layer as compared to the epitaxial layer is achieved by using a very low temperature for the deposition of a part of or the entire buffer layer. The use of a low temperature for the deposition allows a better nucleation of the insulator layer and a reduction of the idle time for the deposition. This allows achieving a greater thickness on the insulator layer as compared with the active transistor zone.

Growing community of inventors

Frankfurt-am-Main, Germany

Bernd Tillack