Austriamicrosystems Ag

Bernd Deutschmann

Pawel Chojecki

Bernd Fankhauser

Michael Mayerhofer

Gottfried Fraiss

A circuit arrangement for protecting an integrated semiconductor circuit includes a protection circuit connected between an element to be protected and a reference potential. The protection circuit includes a thyristor structure. The circuit arrangement also includes a control circuit configured to drive the protection circuit by generating a plurality of control signals drive an active element of the protection circuit.

Circuit arrangement and method for protecting an integrated semiconductor circuit

Circuitry is disclosed for controlling the slope of rising and falling edges of a signal. The circuitry includes a ramp signal generator that receives an input signal and that generates a trapezoidal signal based on the input signal, and a circuit array that receives the trapezoidal signal and that generates control signals based on the trapezoidal signal. Output transistors have gates that receive a set of the control signals. The output transistors include a top transistor and a bottom transistor. The top transistor has a source connected to a supply potential and a drain connected to an output. The bottom transistor has a source connected to a reference potential and a drain connected to the output. The top transistor and the bottom transistor are gated by the control signals to control a shape of an edge of an output signal at the output.

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Munich, Germany

Bernd Deutschmann