Analog Devices,inc.

Analog Devices International Unlimited Company

Analog Devices Global

Analog Devices Global Unlimited Company

Other

Bernard Patrick Stenson

Patrick Martin McGuinness

William Allan Lane

Stephen O'Brien

Paul Malachy Daly

Laurence Brendan O'Sullivan

Andrew David Bain

Paul Martin Lambkin

Anne Maria Deignan

Derek F Bowers

Michael Thomas Dunbar

Michael Noel Morrissey

Baoxing Chen

Shane Patrick Geary

Padraig Fitzgerald

Michael John Flynn

Sombel Diaham

Patrick J Murphy

David J Clarke

Jan Kubik

Raymond C Goggin

Ramji Lakshmanan

Matthew Thomas Canty

Christina B McLoughlin

Christophe Antoine

Edward John Coyne

Oliver J Kierse

Mark Schirmer

Check F Lee

Jo-ey Wong

Michael James Twohig

Daniel Joseph Lucey

Patrick Martin McGuiness

Himanshu Jain

Conor John Mcloughlin

Sarah Carroll

Michael C W Coln

Michael C Coln

Eamon Hynes

Donal McAuliffe

Seamus Paul Whiston

Helen Berney

Fergus John Downey

Roman Trogan

Shane Geary

Mark Daniel De Leon Alea

Alan John Blennerhassett

Mark De Leon Alea

Colette J Blaney

Sinead Maire Mcdermott

Sinead Maire McDermott

Steven Tanghe

James Michael Molyneaux

John Beatty

John G Macnamara

Michal J Osiak

Seamus A Lynch

Patrick M Mcguinness

Derek Frederick Bowers

Patrick Martin Mcguinness

Raynond C Goggin

Padraig L Fitzgerald

Laurence B O'SULLIVAN

Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.

Designs and fabrication of nanogap sensors

A microfabricated thermal platform can be formed over a substrate, such as a silicon wafer, that may form part of the platform. The substrate is coated in a thermally-insulating material, which may be an organic polymer such, as polyimide or SUS. The surface of the thermally-insulating material may include an arrangement of one or more thermal sites, with each site having a reaction plate (or thermal plate) over which chemical reactions may occur. A heating element may be positioned beneath each reaction plate. A fluidic medium, such as a liquid or a gas, may be disposed over the thermal sites. One application is in chemical and biological reactions. In such reactions, the fluidic medium may be an aqueous solution which comprises reagents for those reactions. The fluidic medium may be an ionically conducting fluid, organic solution or a gas. Precise temperature control enables the correct reactions.

Thermal platform and a method of fabricating a thermal platform

A micro-isolator is described. The micro-isolator may include a first isolator element, a second isolator element, and a first dielectric material separating the first isolator element from the second isolator element. A second dielectric material may completely or partly encapsulate the second isolator element, or may be present at outer corners of the second isolator element. The second dielectric material may have a larger bandgap than the first dielectric material, and its configuration may reduce electrostatic charge injection into the first dielectric material. The micro-isolator may be formed using microfabrication techniques.

Insulation jacket for top coil of an isolated transformer

An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.

Integrated circuit packages to minimize stress on a semiconductor die

The disclosed technology generally relates to forming metallization structures for integrated circuit devices by plating, and more particularly to plating metallization structures that are thicker than masking layers used to define the metallization structures. In one aspect, a method of metallizing an integrated circuit device includes plating a first metal on a substrate in a first opening formed through a first masking layer, where the first opening defines a first region of the substrate, and plating a second metal on the substrate in a second opening formed through a second masking layer, where the second opening defines a second region of the substrate. The second opening is wider than the first opening and the second region encompasses the first region of the substrate.

Plated metallization structures

Micro-isolators exhibiting enhanced isolation breakdown voltage are described. The micro-isolators may include an electrically floating ring surrounding one of the isolator elements of the micro-isolator. The isolator elements may be capacitor plates or coils. The electrically floating ring surrounding one of the isolator elements may reduce the electric field at the outer edge of the isolator element, thereby enhancing the isolation breakdown voltage.

Electric field grading protection design surrounding a galvanic or capacitive isolator

Micro-scale devices, such as transformers and capacitors, having a floating conductive layer are disclosed. A floating conductive layer may be disposed in an insulator layer and can reduce a maximum electric field between a first planar conductor and a second planar conductor of a micro-scale passive device. Reduction of a maximum electric field between a first planar conductor and a second planar conductor can reduce undesirable effects on electrical components.

Micro-scale device with floating conductive layer

Techniques for fabricating low-loss magnetic vias within a magnetic core are provided. According to some embodiments, vias with small, well-defined sizes may be fabricated without reliance on precise alignment of layers. According to some embodiments, a magnetic core including a low-loss magnetic via can be wrapped around conductive coils of an inductor. The low-loss magnetic vias can improve performance of an inductive component by improving the quality factor relative to higher loss magnetic vias.

Via for magnetic core of inductive component

Isolators having a back-to-back configuration for providing electrical isolation between two circuits are described, in which multiple isolators formed on a single, monolithic substrate are connected in series to achieve a higher amount of electrical isolation for a single substrate than for isolators formed on separate substrates connected in series. Discrete dielectric regions positioned between isolator components forming an isolator provide electrical isolation between the isolator components as well as between the isolators formed on the substrate. The back-to-back isolator may provide one or more communication channels for transfer of information and/or power between different circuits.

Back-to-back isolation circuit

Radio frequency (RF) isolators are described, coupling circuit domains operating at different voltages. The RF isolator may include a transmitter which emits a directional signal toward a receiver. Layers of materials having different dielectric constants may be arranged to confine the emission along a path to the receiver. The emitter may be an antenna having an aperture facing the receiver.

Radio frequency isolator

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Limerick, Ireland

Bernard Patrick Stenson