Samsung Electronics Co., Ltd.

Sun Microsystems, Inc.

Bernard Ho

Sudhakar Bobba

David J Greenhill

Weiran Kong

Ming Zhang

Weifeng Zhao

Jianfeng Liu

Shupeng Sun

According to one general aspect, an apparatus may include a memory and a reconfigurable error correction array. The memory may be configured to store data. The reconfigurable error correction array may be configured to provide a plurality of levels of error correction to the memory based, at least in part, upon a number of errors detected within the memory.

Reconfigurable ECC for memory

A capacitor structure in a semiconductor device is provided. The capacitor structure includes a first power rail on a topmost level of the semiconductor device, and a second power rail on the topmost level of the semiconductor device. The capacitor structure also includes a dielectric layer disposed over at least a portion of one of the first power rail and the second power rail. The capacitor structure further includes a conductive layer disposed over and between the first power rail and the second power rail where the conductive layer is in electrical contact with the power rail not having the dielectric layer, and the conductive layer is disposed over the dielectric layer.

Thin capacitive structure

Growing community of inventors

Fremont, CA, United States of America

Bernard Ho