International Business Machines Corporation

Bernard A King-Smith

Bret Ronald Olszewski

Basu Vaidyanathan

Stephen Rees

Kavitha Vittal Murthy Baratakke

Herman Dietrich Dierks

Kiet Hien Lam

Andres Herrera

Gary J Mincher

Murray J Richman

A process for processor management includes activating a delay thread running on a processor. A determination is made whether a wait event for a first thread running on the processor is in a queue. Responsive to determining that the wait event for the first thread is in the queue, a determination is made whether a wait time associated with the wait event has expired. Responsive to determining that the wait time has not expired, a determination is made if wait time exceeds a threshold. Responsive to determining that the wait time exceeds the threshold, a timer is set and a low power mode is initiated for the processor.

Processor management via thread status

Systems, methods, and computer program products to perform an operation comprising providing a plurality of assist threads configured to process data units received by a network adapter, wherein each of the plurality of assist threads comprises a queue configured to store data units allocated to the respective assist thread, allocating data units received by the network adapter to assist threads in a subset of the plurality of assist threads according to a first function, wherein the subset includes a first assist thread and does not include a second assist thread, of the plurality of assist threads, monitoring the queues of the assist threads in the subset, and upon determining that a count of data units in the queue of the first assist thread exceeds a first threshold, modifying the first function to include the second assist thread in the subset of the plurality of assist threads.

Dynamically optimized device driver protocol assist threads

Various systems, processes, and products may be used to manage a processor. In particular implementations, managing a processor may include the ability to determine whether a thread is pausing for a short period of time and place a wait event for the thread in a queue based on a short thread pause occurring. Managing a processor may also include the ability to activate a delay thread that determines whether a wait time associated with the pause has expired and remove the wait event from the queue based on the wait time having expired.

Mechanisms for controlling rollover or reset of hardware performance counters in the data processing system. A signal indicating that a rollover or reset of a first hardware performance counter has occurred is received and it is determined if the first hardware performance counter is analytically related to one or more second hardware performance counters based on defined ganged hardware performance counter sets. A signal is sent to each of the one or more second hardware performance counters in response to a determination that the first hardware performance counter is analytically related to the one or more second hardware performance counters. Each of the one or more second hardware performance counters is reset to an initial value in response to the one or more second hardware performance counters receiving the signal from the ganged hardware performance counter rollover/reset logic.

Ganged hardware counters for coordinated rollover and reset operations

Sockets of a computing environment are optimally tuned, even though the environment is dynamic. The tuning is based on information dynamically determined at the time a socket is opened. The information includes, for instance, application specific information and/or socket specific information. Based on the information, one or more parameters of the socket, such as a socket send buffer size and/or a socket receive buffer size, are set to reflect the current configuration of the environment.

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Lake Katrine, NY, United States of America

Bernard A King-Smith