International Business Machines Corporation

Bernadette Ann Pierson

Anthony M Palagonia

Dennis A Schmidt

John Edward Cronin

Patricia E Marmillion

Gregory J Boss

Christopher L Molloy

Jayashree Vaidyanathan

Cesar Augusto Rodriguez Bravo

Charles Evan Beller

Edgar Adolfo Zamora Duran

Wayne John Howell

Howard L Kalter

James Marc Leas

Harold G Linde

Cuc Kim Huynh

John Anthony Bracchitta

Matthew J Rutten

Bruno Roberto Aimi

Andre Conrad Forcier

Henry Charles Rickers

Howard J Walter, Jr

Patricia McGuinness Marmillion

Patricia McGuinnes Marmillion

Naresh Nayar

Robert H Bell, Jr

Michael Jay Shapiro

Louis Bennie Capps, Jr

Thomas Edward Cook

William Alfred Syverson

Thomas J Dewkett

Glenn Walton Gale

Ronald Edward Newhart

Patricia McGuiness Marmillion

A system and method for automated gift determination and delivery is provided, which include identifying a contact from an electronic contact list for receiving a gift, detecting from first data related to the contact a change in an emotional state of the contact, validating from second data the change in the emotional state of the contact, and automatically selecting the gift from a plurality of identified gifts that is determined to be commensurate with the change status and a current emotional state of the contact.

System, computer program product, and method for automated gift determination and delivery

Systems and methods for source verification are disclosed. A method includes: receiving, by a computing device, a report from a first source; determining, by the computing device, the first source is listed in a source repository based on receiving the report; selecting, by the computing device, a second source at a location remote from the first source based on the source being listed in the source repository; confirming, by the computing device, the report from the first source based on information received from the second source; repeating, by the computing device, the selecting and the confirming until a value of information in the report from the second source exceeds an information trust level value for the report.

Source verification device

Methods, computer program products, and systems are presented. The method computer program products, and systems can include, for instance: obtaining one or more data feed that includes data of individuals within a crowd, wherein the crowd comprises a plurality of individuals gathered within an area; examining data of the one or more data feed to return behavior parameter values for respective individuals of the plurality of individuals; identifying, using values of the behavior parameter values, a disrupted group of a plurality of the individuals of the crowd, wherein the identifying is in dependence on a first one or more criterion being satisfied; detecting, using values of the behavior parameter values, a disruptor individual within the disrupted group, the detecting in dependence on a second one or more criterion being satisfied; and providing, by machine logic, one more disruptor mitigation output to mitigate disruptive behavior of the disruptor individual.

Disruptor mitigation

A computer-implemented method includes: determining, by a computing device, a location of an individual in a building relative to the location of an exit of the building; determining, by the computing device, the location of obstacles or hazards within the building; determining, by the computing device, a path from the individual to the exit based on determining the location of the individual relative to the exit and the location of the obstacles or hazards; generating, by the computing device, signaling instructions based on the path; and outputting, by the computing device, the signaling instructions to one or more signaling devices, wherein the outputting the signaling instructions control operations of the one or more signaling devices to guide the individual to the exit based on the path.

Facilitating a search of individuals in a building during an emergency event

A multiprocessor system which includes automatic workload distribution. As threads execute in the multiprocessor system, an operating system or hypervisor continuously learns the execution characteristics of the threads and saves the information in thread-specific control blocks. The execution characteristics are used to generate thread performance data. As the thread executes, the operating system continuously uses the performance data to steer the thread to a core that will execute the workload most efficiently.

Method for autonomic workload distribution on a multicore processor

An intellectual property management facility for proactively creating, developing and managing an intellectual property portfolio includes: determining available resource capacity for an intellectual property activity in a tracking system; assigning technical attributes to the activity in the tracking system; apportioning resource capacity for the activity by technical attribute based on the value assigned to each of the technical attributes and based on available resource capacity; obtaining actual resource usage by technical attribute from the tracking system; and managing resource allocation for the intellectual property activity by determining the difference between the actual resource usage and the resource allocation by technical attribute.

Intellectual property management method and apparatus

In a silicon on insulator technology, cooling channels in a support substrate are located substantially under the junction regions of selected individual active devices in a semiconductor layer, where the junction regions are separated from the substrate by an insulating layer. In a second embodiment, thermal conductors in a support substrate are located substantially under the junction regions of selected individual active devices in a semiconductor layer where the junction regions are separated from the substrate by an insulating layer. Optionally, either the cooling channels or the thermal conductors may be enlarged such that a plurality of devices may be cooled by a single cooling channel or thermal conductor.

Cooling method for silicon on insulator devices

Disclosed is a method and apparatus for polishing a semiconductor wafer. This invention describes a novel in situ method for eliminating residual slurry and slurry abrasive particles on the wafer. A reactant is added to the slurry during the end of the Chemical Mechanical Polish (CMP) process to dissolve the slurry and etch the abrasive particles.

Apparatus for removing slurry particles

A forced plug process for high aspect ratio structures. The process comprises the steps of providing a liquid plug in a high aspect ratio structure; increasing a gas pressure to force the liquid plug down into the high aspect ratio structure; and suddenly decreasing the gas pressure allowing the liquid plug to be ejected from the high aspect ratio structure. The process is useful for removing unwanted particles from a high aspect ratio structure, as well as for etching and coating the side walls of the structure.

Forced plug processing for high aspect ratio structures

Integrated Circuit ('IC') chips are formed with precisely defined edges and sizing. At the wafer processing level, trenches are lithographically etched in the kerf regions to define the edges of the IC chips on the wafer. The trenches are filled with insulating material, and upper level wiring and metallization is completed for the IC chips on the wafer. Further trenches are defined down to the filled previously formed trenches. The wafer is thinned from its bottom up to the filled trenches, and the insulating material therein is removed to separate the individual IC chips from the wafer. The precision of IC chip edge definition facilitates forming the IC chips into stacks more easily because many stack level alignment processes become unnecessary.

Methods for precise definition of integrated circuit chip edges

Method of removing slurry particles

Stacked three-dimensional devices can be prepared by stacking wafers as an alternative to stacking individual devices. Chip regions are formed on several wafers with each chip region being surrounded by a separation region, such as an insulator filled trench. The wafers are then stacked with the chip regions in alignment. Aligning the wafers can be facilitated using notched regions in the periphery of the wafers. The wafers are then joined together by lamination. After laminating the stacks of wafers, stacks of chips are separated by etching, dicing or other processes, which separate out stacked chip devices from the stacked wafer at the chip separation regions. The process allows several stacked chip devices to be manufactured simultaneously.

Method for stacked three dimensional device manufacture

Growing community of inventors

South Hero, VT, United States of America

Bernadette Ann Pierson