Western Digital Technologies, Inc.

Hgst Netherlands, B.v.

Berck Nash

Randall L Hess

James Michael Reiser

Jesse L Yandell

Randy Roberson

Kris B Stokes

Michael Walker

Described herein are enhancements for managing multi-host Peripheral Component Interconnect Express (PCIe) switching. In one implementation, a PCIe switch coupled to a host processing system and PCIe slots may receive enumeration requests from the host processing system to identify available PCIe devices. In response to the enumeration requests, the PCIe switch may transfer responses to the host processing system indicating device identifier information for PCIe devices associated with the PCIe slots even if one or more of the PCIe devices is not currently installed.

Peripheral component interconnect express (PCIe) device enumeration via a PCIe switch

To provide enhanced operation of data storage devices and systems, various systems, apparatuses, methods, and software are provided herein. In a first example, a data storage device accumulates write data into a cache storage region prior to committing into an archive storage region and maintains a data structure that tracks the write data in the cache storage region. Responsive to receiving first write data into the cache storage region, the data storage device establishes first tracking elements in the data structure for the first write data in the cache storage region. Responsive to receiving second write data directed to storage locations overlapping the first write data, the data storage device accepts the second write data into the cache storage region and establishes second tracking elements in the data structure for the second write data in the cache storage region without modifying the first tracking elements.

Non-blocking caching for data storage drives

Described herein are enhancements for managing multi-host Peripheral Component Interconnect Express (PCIe) switching. In one implementation, a system includes one or more PCIe devices and a PCIe switch configured to receive a first interrupt corresponding to a first interrupt vector from a PCIe device, wherein the first interrupt vector comprises at least a virtual address and a first data value. The switch is further configured to translate the first interrupt vector into a second interrupt vector, wherein the second interrupt vector comprises a second address and a second data value, and transfer a second interrupt using the second interrupt vector to a host of a plurality of hosts that corresponds to the second interrupt vector.

Multi-host peripheral component interconnect express (PCIe) switching based on interrupt vector from PCIe device

A data storage array is presented that includes a plurality of storage drives each comprising storage media with a first storage region and a shingled magnetic recording (SMR) storage region. The data storage array includes a control system communicatively coupled to the storage drives and configured to receive a write operation over a host interface for storage of write data by the data storage array. Responsive to the write operation, the control system is configured to cache the write data in first storage regions of two or more of the storage drives prior to transfer of the write data into at least an SMR storage region of a storage drive associated with the write operation.

Enhanced redundant caching for shingled magnetic recording devices in data storage drive assemblies

To provide enhanced operation of data storage devices and systems, various systems, apparatuses, methods, and software are provided herein. In a first example, a data storage device is presented with storage media comprising a cache storage region and a shingled magnetic recording (SMR) storage region that is divided into burst zones. A storage control system receives write operations and accumulates write data in the cache storage region until a commit threshold condition. Responsively, the storage control system transfers the write data into a burst zone of the SMR storage region, and verifies the write data written into the burst zone once the burst transfer is complete. Responsive to data verify errors in the write data written into the burst zone, the storage control system writes data associated with the data verify errors into an exception location associated with the burst zone.

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Divide, CO, United States of America

Berck Nash