Samsung Electronics Co., Ltd.

Beob-Rae Cho

Jong-hyun Choi

Byung-Chul Kim

Byung-Hoon Jeong

Young-Hun Seo

Woo-seop Jeong

Kwang-Sook Noh

Young-Gu Kang

Jun-phyo Lee

Seung-Bum Ko

Mi-Jo Kim

An internal voltage generator is disclosed. The internal voltage generator may include a comparator for controlling a voltage of a first node in response to a voltage difference between a reference voltage and an internal voltage, an internal voltage driving portion connected between a driving node and an internal voltage node to apply the internal voltage to the internal voltage node in response to a voltage level of the first node, and/or a leakage current interrupting portion to apply an external voltage to the first node to deactivate the internal voltage driving portion and to interrupt the external voltage applied to the driving node to interrupt a leakage current.

Internal voltage generator

A semiconductor device includes a memory and a power voltage interrupter configured to interrupt an external power voltage applied to circuitry of the semiconductor device responsive to a Deep Power Down (DPD) command signal generated in a DPD mode of the memory. A power voltage shifter is configured to shift a power voltage in the circuitry to a specific level responsive to the DPD command signal.

Semiconductor devices including an external power voltage control function and methods of operating the same

A semiconductor device includes a DRAM and a temperature sense circuit. The DRAM has a refresh period that varies responsive to a temperature signal. The temperature sense circuit is configured to generate the temperature signal having a first binary value in response to sensing a temperature of the DRAM of at least a first temperature level, and to generate the temperature signal having a second binary value in response to sensing a temperature of the DRAM of less than a second temperature level, wherein the second temperature value is less than the first temperature value.

DRAM device with a refresh period that varies responsive to a temperature signal having a hysteresis characteristic

Provided are a synchronous semiconductor device having constant data output time regardless of a bit organization, and a method of adjusting data output time. The synchronous semiconductor device includes an internal clock generator for receiving an external clock and generating an internal clock, a clock controller for adjusting the phase of the internal clock and generating a data output clock in response to bit organization information, and a data output buffer for outputting data read from a memory cell to the outside in response to the data output clock. Thus, it is possible to prevent vertical vibration in a disc loaded in a disc driver regardless of wobble of the disc.

Synchronous semiconductor device having constant data output time regardless of bit organization, and method of adjusting data output time

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Gyeonggi-do, South Korea

Beob-Rae Cho