Marvellworld Trade Ltd.

Marvell International Limited

Marvell Asia Pte., Ltd.

Benson Chau

Frank Huang

Ken Yeung

Xiaohua Luo

Venkatachalam Shanmugasundaram

Tao Song

Zheng Cao

Xinyu Zang

Kanwal Preet Banga

A wireless data transceiver includes a media access controller (MAC) that receives an inbound packet from an air interface and to buffer that packet for transport to a host, and receives an outbound packet and transfers that packet to the air interface. A host interface receives the inbound packet from the MAC and transfers the inbound packet to the host, and receives the outbound packet from the host for transfer to the MAC. Transport controller circuitry (TCC), including processing circuitry configured to execute instructions, manages the transceiver. Hardware data transport circuitry (HDTC) for transporting packets in either direction between the MAC and the host interface includes a buffer memory having a plurality of slots. The TCC or HDTC issues a start or stop signal to the host interface causing the HDTC and the host interface to begin or end transfer of data between the buffer memory and the host interface.

Data transfer interface with reduced signaling

In an example, a method includes determining, at a host device, a power state of a digital input/output device, and transmitting a clock signal having a first frequency from the host device to the input/output device responsive to a determination that the input/output device is in a lower power state. The method also includes determining, at the host device, that the input/output device has transitioned into a higher power state, and transmitting a clock signal having a second frequency from the host device to the input/output device responsive to a determination that the input/output device has transitioned into the higher power state. The first frequency is lower than the second frequency.

Input-output device management using dynamic clock frequency

Methods, systems and computer program products are described for transferring aggregated data packets over an I/O interface from a host to a multiport embedded device. For example, a method includes receiving, by the device from the host, a single write command that (i) specifies two or more ports from among multiple ports of the device, and (ii) includes two or more data packets to be respectively written to the specified ports. The multiple ports of the device are mapped to corresponding locations of memory of the device. The method further includes saving, by the device in response to the single write command, the two or more data packets at two or more memory locations to which the specified ports are mapped. Additionally, the method includes sending, upon saving the data packets, a single notification to the host indicating that the device is ready to receive another write command.

Method and apparatus for transferring data between a host and an embedded device

In a method for controlling a wireless device assembly coupled to a host assembly, a clock signal is received at the wireless device assembly from the host assembly. The clock signal is supplied to an interface module in the wireless device assembly during a power save mode of the wireless device assembly and is used to operate the interface module. An initialization command is received at the wireless device assembly from the host assembly and is detected with the interface module. In response to detecting the initialization command, at least a portion of the wireless device assembly, other than the interface module, is activated.

Intelligent detection interface for wireless devices

Growing community of inventors

Santa Clara, CA, United States of America

Benson Chau