Macom Technology Solutions Holdings, Inc.

Benone Achiriloaie

Eric Hokenson

Radio frequency (RF) power pallets including primary or first circuit boards and daughter or second circuit boards are described. An example RF power pallet includes a first circuit board comprising a first side, a second side, a first metal layer, and a second metal layer. The power pallet also includes an RF power amplifier coupled to the first metal layer and a second circuit board electrically coupled to the first metal layer. The second circuit board includes a bias voltage driver for the RF power amplifier, and the first metal layer includes a bias voltage trace that extends from a contact of the second circuit board to a gate of the power amplifier. The second circuit board extends the features of the RF pallet, while avoiding some increases in size, costs, and complexity that would typically be associated with the new features.

RF power pallet with management daughter board

A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.

Self-biasing and self-sequencing of depletion mode transistors

Self-biasing and self-sequencing of depletion-mode transistors

An apparatus comprising an RF circuit, a converter circuit, an amplifier, and a delay circuit. The RF circuit may be configured to generate (i) an output signal and (ii) a first intermediate signal, in response to (i) an input signal and (ii) a control signal. The converter circuit may be configured to generate a second intermediate signal in response to the first intermediate signal. The amplifier may be configured to generate a third intermediate signal in response to the second intermediate signal. The delay circuit may be configured to generate the control signal in response to the third intermediate signal. The RF circuit may generate the output signal having a flattened response by providing pulse shaping in response to the control signal.

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Corona, CA, United States of America

Benone Achiriloaie