Marvell Asia Pte., Ltd.

Benjamin Tomas Reyes

Geoffrey O Hatcher

Ray Luan Nguyen

Stephen Jantzi

Benjamin P Smith

Simon D Forey

Stephane Dallaire

Karthik Raviprakash

Praveen Prabha

Luke Wang

Basel Alnabulsi

Transceiver circuitry in an integrated circuit device includes a receive path including an analog front end for receiving analog signals from an analog transmission path and conditioning the analog signals, and an analog-to-digital converter configured to convert the conditioned analog signals into received digital signals for delivery to functional circuitry, and a transmit path including a digital front end configured to accept digital signals from the functional circuitry and to condition the accepted digital signals, and a digital-to-analog converter configured to convert the conditioned digital signals into analog signals for transmission onto the analog transmission path. At least one of the analog front end and the digital front end introduces distortion and outputs a distorted conditioned signal. The transceiver circuitry further includes distortion correction circuitry at the one of the analog front end and the digital front end, to determine and apply a distortion cancellation function to the distorted signal.

Method and apparatus for cancelling front-end distortion

Equalization circuitry for a data channel in an integrated circuit device includes an analog equalization stage coupled to the data channel, and a digital signal processing stage downstream of the analog equalization stage. The digital signal processing stage generates control signals to control the analog equalization stage, and includes a digital equalization stage that operates on output of the analog equalization stage. The analog equalization stage may further include an enhanced processing stage for optical signals, which may be selectably coupled to the analog equalization stage. The analog equalization stage may include at least one feed-forward or feedback equalization stage, and a decision stage that outputs decision signals at one of a first plurality of signal levels. The enhanced processing stage operates on the decision signals to output enhanced decision signals at one of a second plurality of signal levels of higher resolution than the first plurality of signal levels.

Hybrid analog/digital equalizer architecture for high-speed receiver

Growing community of inventors

Cordoba, Argentina

Benjamin Tomas Reyes