Advantage Logic, Inc.

Btr Limited

Actel Corporation, Inc.

National Semiconductor Corporation

Btr, Inc. C/o Corporate Trust Co.

Benjamin S Ting

Peter M Pani

Frederick Furtek

Scott K Pickett

Rafael C Camarota

David Warren Hawley

Benny Ma

Tim Garverick

Sanjay Popli

Jim Sutherland

Shao-Pin Chen

Shankar Moni

Arthur Smith, Jr

Venkata Alturi

Shin-Mann Day

In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.

Permutable switching network with enhanced interconnectivity for multicasting signals

A L-level permutable switching network (L-PSN) having switches and multiple levels of conductors that are used to connect a first plurality of conductors to other multiple sets of conductors within respective interconnect resources constraints. The L-PSN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The L-PSN is used to connect a first set of conductors, through the L-PSN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The L-PSN is scalable for large sized sets of conductors and can be used in tandem or hierarchically to enable programmable interconnections among large sized circuits.

Scalable non-blocking switching network for programmable logic

An integrated circuit having an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. At least an (i&#x2212;1)-th level of conductors of the L-PSN comprising Inumber of conductors selectively couple to the i-th level of conductors comprising Inumber of conductors which comprise of D[i] sets of conductors in the L-PSN, where i is selected from [1:L+1], through ((I&#xd7;D[i])+I) number of switches where each conductor of the Inumber of conductors selectively couples to at least (D[i]+1) number of conductors of the Inumber of conductors, at least one conductor from each of the D[i] sets of conductors, for D[i] greater than one. The integrated circuit can be used in various electronic devices.

Enhanced permutable switching network with multicasting signals for interconnection fabric

A routing fabric using multiple levels of switching networks along with associated routing matrices to allow a more uniform and shorter interconnection or routing path among logic modules or routing modules compared with those in the conventional designs. The resulting routing fabric can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.

Modular routing fabric using switching networks

An architecture of hierarchical interconnect scheme for field programmable gate arrays (FPGAs).

Architecture and interconnect scheme for programmable logic circuits

A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors in a generally unrestricted fashion within respective interconnect resources constraints. The SN can be applied in a wide range of applications, in tandem or hierarchically, to provide a large switch network used in network, routers, and programmable logic circuits. The SN is used to connect a first set of conductors, through the SN, to multiple sets of conductors in a given logic circuit hierarchy whereby the conductors in each of the multiple sets are equivalent or exchangeable, which in term, by construction, makes the first set of conductors equivalent when used in the next level of circuit hierarchy. The SN is scalable for large sized sets of conductors and can be used hierarchically to enable programmable interconnections among large sized circuits.

In one embodiment, an integrated circuit has an L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors and (L+2) levels of conductors for L at least equal to one. An (i&#x2212;1)-th level of conductors comprising Inumber of conductors selectively couple to the i-th level of conductors comprising Inumber of conductors which comprise of D[i] sets of conductors in the L-PSN, where i is selected from [1:L+1], through ((I&#xd7;D[i])+I&#xd7;Q) number of switches where each conductor of the Inumber of conductors selectively couples to at least (D[i]+Q) number of conductors of the Inumber of conductors, at least one conductor from each of the D[i] sets of conductors, for Q at least equal to one and D[i] greater than one. The integrated circuit can be used in various electronic devices.

An integrated circuit including a programmable logic array with a plurality of logic cells and programmable interconnections to receive input signals and to perform logical functions to transmit output signals. The integrated circuit may also include megacells comprising a plurality of functional blocks receiving inputs and transmitting outputs. The integrated circuit may also include a programmable interconnections subsystem to cascade the megacells. The megacells are coupled to the programmable logic array.

Method and apparatus for universal program controlled bus architecture

In one embodiment, an integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.

Growing community of inventors

Saratoga, CA, United States of America

Benjamin S Ting