Hitachi Global Storage Technologies Netherlands B.v.

Hitachi Global Storage Technologies

Benjamin Lu Chen Wang

Howard Gordon Zolla

Wipul Jayasekara

Hugo Alberto Emilio Santini

Jui-lung Li

Patrick Rush Webb

Mark Anthony Church

Amanda Baer

Frederick Hayes Dill

Marie-Claire Cyrille

James Bernard Kruger

Timothy James Minvielle

Shawn Marie Collier Hernandez

Wipul Pemsiri Jayaekara

Robin Lynn Almes

Jiunn Tsay

Mary Kathyrn Gutberlet

A method for milling a structure. A single- or multi-layer resist having no undercut is added to a surface of a structure to be milled, the surface to be milled defining a plane. A milling process, such as ion milling, is performed. The milling process includes milling the structure at high incidence and milling the structure at razing incidence. The milling process can be performed only once, or repeated multiple times. High incidence can be defined as about 65 to about 90 degrees from the plane of the surface being milled. Razing incidence can be defined as about 0 to about 30 degrees from the plane of the surface being milled.

Method of fabricating electronic component using resist structure with no undercut

A method is presented for fabricating a read head having a read head sensor and a hard bias/lead layer which includes depositing a strip of sensor material in a sensor material region, and depositing strips of fast-milling dielectric material in first and second fast-milling dielectric material regions adjacent to the sensor material region. A protective layer and a layer of masking material is deposited on the strip of sensor material and the strips of fast-milling dielectric material to provide masked areas and exposed areas. A shaping source, such as an ion milling source, is provided which shapes the exposed areas. Hard bias/lead material is then deposited on the regions of sensor material and fast-milling dielectric material to form first and second leads and a cap on each of these regions. The cap of hard bias/lead material and the masking material is then removed from each of these regions.

Method to improve ability to perform CMP-assisted liftoff for trackwidth definition

A charge-balanced, continuous-write mask and wafer process changes the magneto resistive photo-definition step to a two-mask step operation. Critical images are written on one mask layer at a very small electron beam spot size, and non-critical images are written on a second mask layer at a relatively larger electron beam spot size. Both mask layers are put onto the same glass substrate where the critical mask layer is located at the most accurate position on the substrate. The non-critical images may be placed in a peripheral field. In wafer processing, the critical field is aligned and exposed onto the wafer and then the non-critical field is aligned and exposed.

System and method for charge-balanced, continuous-write mask and wafer process for improved colinearity

A method of making a magnetic head assembly wherein the magnetic head assembly has a write head with a pole tip includes the steps of forming a shaping layer on an underlying layer wherein the shaping layer has a side surface and a top surface, ion beam sputter depositing a ferromagnetic material layer on the underlying layer and on the side and top surfaces of the shaping layer and removing first and second portions of the ferromagnetic material layer from the underlying layer and the top surface of the shaping layer, respectively, leaving a remaining portion of the ferromagnetic material layer on the side surface of the shaping layer which is the aforementioned pole tip.

Method of making a narrow pole tip by ion beam deposition

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San Jose, CA, United States of America

Benjamin Lu Chen Wang