Texas Instruments Corporation

Texas Instruments Instruments Incorporated

Benjamin Joseph Sheahan

Richard C Pierson

Kerry C Glover

A phase locked loop system (52) and method is used in a synchronously sampled data channel (10) of a disk drive mass storage system (30).

Phase locked loop system and method for use in a data channel

A pair of complementary signals are switched between a high state and a low state such that the complementary signals are switched within a time period less than two gate delays. An inverter biases other inverters so that these two inverters are maintained at their threshold levels. The maintenance at the threshold values enable these two inverters to be switched quickly.

Ultra low jitter differential to fullswing BiCMOS comparator with equal

A level shift is provided between a first level and a second level for a first and second compensatory signal. Power supply variations are measured and the levels are compensated for these power supply variations so that the power supply does not affect the first and second levels.

Read Channel device

A circuit provides a restart signal to indicate a zero crossing of a continuous varying signal. A zero phase signal is generalized based on a zero crossing of the continuous varying signal. The continuous varying signal is sampled and held in accordance with the zero crossing. The continuous varying signal is converted to complementary signals, and these complementary signals are in turn converted to a signal appropriate for CMOS circuits.

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Benjamin Joseph Sheahan