Nvidia Corporation

Benjamin J Garlick

Edward Anthony Hutchins

Richard A Silkebakken

Robert C Keller

Michael C Shebanow

Ming Benjamin Zhu

Scott C Heeschen

Sanjay O Gupta

A context switch request is made from a host unit to a processing engine separately from the method stream to that processing engine and does not require the host unit to know what context the processing engine is currently working on. Upon receiving the request, the processing engine compares the requested context with the context that it is currently working on, and if the two are different, performs the context switch to the requested context. On the other hand, if the two are the same, the engine does not perform the context switch and continues working on the current context.

Context switch signaling method and system

A method and apparatus for automatically generating a list of circuit elements, such as registers, to be context switched designed to avoid the omission of elements that must be context switched are provided. The method generally involves creating a list of potential elements for context switching, assuming these elements will be context switched by default, and then excluding all elements that must not be context switched.

Method and system for determining context switch state

A halt sequencing protocol permits a context switch to occur in a processing pipeline even before all units of the processing pipeline are idle. The context switch method based on the halt sequencing protocol includes the steps of issuing a halt request signal to the units of a processing pipeline, monitoring the status of each of the units, and freezing the states of all of the units when they are either idle or halted. Then, the states of the units, which pertain to the thread that has been halted, are dumped into memory, and the units are restored with states corresponding to a different thread that is to be executed after the context switch.

Context switching using halt sequencing protocol

Methods and systems for optimizing graphics data processing employ various binning flush algorithms to optimize the utilization of binning memory in a graphics system. Binning flush algorithms provide for processing all geometry and commands binned up to the point the binning memory becomes unavailable, and storing and restoring all necessary intermediate data generated during the partial tile rendering.

Binning flush in graphics data processing

A graphics processor displays pixels in an image at non-uniform resolution, using a maximum resolution in the interior of a surface in the image, and a lower resolution at edges. Higher color resolution in the interior eliminates color aliasing that would otherwise be caused if the interior were displayed at the lower resolution. Lower resolution at the edges is not noticeable to the human eye, and allows the graphics processor to use one or more low resolution color signals in generating the displayed image, thereby reducing hardware (e.g. memory locations required to store such signals, and lines required to route such signals). One such processor (not necessarily a graphics processor) includes a resolution reducer and a resolution enhancer that respectively reduce and enhance the resolution of a signal. Specifically, the resolution reducer reduces the resolution of a high resolution signal to generate a low resolution signal. The resolution enhancer enhances the low resolution signal to generate a signal (called &ldquo;enhanced resolution signal&rdquo;) having the same number of bits as the high resolution signal. One such resolution reducer simply drops a number of least significant bits to generate a low resolution signal, and the corresponding resolution enhancer passes, as the enhanced resolution signal, the low resolution signal and the above-described number of least significant bits of a high resolution signal. The enhanced resolution signal is not a significant aspect of one embodiment because in some embodiments the low resolution signal and the high resolution signal are used directly.

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Sunnyvale, CA, United States of America

Benjamin J Garlick